Message ID | 20210825122613.v3.3.Ifec72a83f224b62f24cfc967edfe78c5d276b2e3@changeid (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Add support to the mmsys driver to be a reset controller | expand |
Hi, Enric: Enric Balletbo i Serra <enric.balletbo@collabora.com> 於 2021年8月25日 週三 下午6:26寫道: > > Update device tree binding documentation for the dsi to add the optional > property to reset the dsi controller. Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> > > Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> > Acked-by: Rob Herring <robh@kernel.org> > --- > > (no changes since v2) > > Changes in v2: > - Added a new patch to describe the dsi reset optional property. > > .../devicetree/bindings/display/mediatek/mediatek,dsi.txt | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt > index 8238a86686be..3209b700ded6 100644 > --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt > +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt > @@ -19,6 +19,11 @@ Required properties: > Documentation/devicetree/bindings/graph.txt. This port should be connected > to the input port of an attached DSI panel or DSI-to-eDP encoder chip. > > +Optional properties: > +- resets: list of phandle + reset specifier pair, as described in [1]. > + > +[1] Documentation/devicetree/bindings/reset/reset.txt > + > MIPI TX Configuration Module > ============================ > > @@ -45,6 +50,7 @@ dsi0: dsi@1401b000 { > clocks = <&mmsys MM_DSI0_ENGINE>, <&mmsys MM_DSI0_DIGITAL>, > <&mipi_tx0>; > clock-names = "engine", "digital", "hs"; > + resets = <&mmsys MT8173_MMSYS_SW0_RST_B_DISP_DSI0>; > phys = <&mipi_tx0>; > phy-names = "dphy"; > > -- > 2.30.2 >
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt index 8238a86686be..3209b700ded6 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt @@ -19,6 +19,11 @@ Required properties: Documentation/devicetree/bindings/graph.txt. This port should be connected to the input port of an attached DSI panel or DSI-to-eDP encoder chip. +Optional properties: +- resets: list of phandle + reset specifier pair, as described in [1]. + +[1] Documentation/devicetree/bindings/reset/reset.txt + MIPI TX Configuration Module ============================ @@ -45,6 +50,7 @@ dsi0: dsi@1401b000 { clocks = <&mmsys MM_DSI0_ENGINE>, <&mmsys MM_DSI0_DIGITAL>, <&mipi_tx0>; clock-names = "engine", "digital", "hs"; + resets = <&mmsys MT8173_MMSYS_SW0_RST_B_DISP_DSI0>; phys = <&mipi_tx0>; phy-names = "dphy";