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b=TpTXlMOJqBgZ6vzcW6kN2yOcFXoHNl++PnvougGHmTX/wBqQnGFD5kkQEmgBaHFIju +RAhyo6S1yunktEaYD2ncu7GX2o5LFl6pkGvhjWDmsgNeAPdYudEJVYzvZCBOSrBrH3c mEGUJrmmtlPWCT41OcchQV5keVh/qR18dWfd3if1Pe8vSzqWkIWuwkkZ/eXzJw5cTZdN 5RhTmlN6a7AiB2GLtaDFG4sdVWDGckJY6UZs5hiLOVBbL0t6ZUm8dcDNTM94o8ZNOB0p UNfil1/p8CTHBPjTl6yFafdNfH4Qb/OLRdhkrH7WoC/HAHbbrZKmLCtk59XkKudaAlJA PhEQ== X-Gm-Message-State: AOAM5318P0ZQP5CdyHNohVPN5I1FFZ7bBHdQZvZECoSCNvgz5zmb9V/a BzlZ229qMvAIHN0+z1n+XiTkUg== X-Google-Smtp-Source: ABdhPJy49jJmzwFQTvOOSCXErrx4sl47Ylj9R8HPx2KuflIOgsK25MWAhOfYiIYYCyLv+vTPAMKitg== X-Received: by 2002:a05:6000:1689:: with SMTP id y9mr23685780wrd.52.1633945591821; Mon, 11 Oct 2021 02:46:31 -0700 (PDT) Received: from blmsp.lan ([2a02:2454:3e6:c900::97e]) by smtp.gmail.com with ESMTPSA id o8sm21349291wme.38.2021.10.11.02.46.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Oct 2021 02:46:31 -0700 (PDT) From: Markus Schneider-Pargmann To: Chun-Kuang Hu , Philipp Zabel , Rob Herring , Vinod Koul Cc: Sam Ravnborg , dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, Markus Schneider-Pargmann Subject: [PATCH v4 2/7] dt-bindings: mediatek,dp: Add Display Port binding Date: Mon, 11 Oct 2021 11:46:19 +0200 Message-Id: <20211011094624.3416029-3-msp@baylibre.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211011094624.3416029-1-msp@baylibre.com> References: <20211011094624.3416029-1-msp@baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211011_024633_595178_59247966 X-CRM114-Status: GOOD ( 11.76 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org This controller is present on several mediatek hardware. Currently mt8195 and mt8395 have this controller without a functional difference, so only one compatible field is added. The controller can have two forms, as a normal display port and as an embedded display port. Signed-off-by: Markus Schneider-Pargmann --- .../display/mediatek/mediatek,dp.yaml | 89 +++++++++++++++++++ 1 file changed, 89 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml new file mode 100644 index 000000000000..f7a35962c23b --- /dev/null +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml @@ -0,0 +1,89 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/mediatek/mediatek,dp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek Display Port Controller + +maintainers: + - CK Hu + - Jitao shi + +description: | + Device tree bindings for the Mediatek (embedded) Display Port controller + present on some Mediatek SoCs. + +properties: + compatible: + enum: + - mediatek,mt8195-edp_tx + - mediatek,mt8195-dp_tx + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: faxi clock + + clock-names: + items: + - const: faxi + + power-domains: + maxItems: 1 + + ports: + $ref: /schemas/graph.yaml#/properties/ports + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: Input endpoint of the controller, usually dp_intf + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: Output endpoint of the controller + +required: + - compatible + - reg + - interrupts + - ports + +additionalProperties: false + +examples: + - | + #include + #include + dp_tx: edp_tx@1c500000 { + compatible = "mediatek,mt8195-edp_tx"; + reg = <0 0x1c500000 0 0x8000>; + interrupts = ; + power-domains = <&spm MT8195_POWER_DOMAIN_EPD_TX>; + pinctrl-names = "default"; + pinctrl-0 = <&edp_pin>; + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + edp_in: endpoint { + remote-endpoint = <&dp_intf0_out>; + }; + }; + port@1 { + reg = <1>; + edp_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; + }; + };