@@ -3,7 +3,8 @@
obj-$(CONFIG_VIDEO_MEDIATEK_VCODEC) += mtk-vcodec-dec.o \
mtk-vcodec-enc.o \
mtk-vcodec-common.o \
- mtk-vcodec-dec-common.o
+ mtk-vcodec-dec-common.o \
+ mtk-vcodec-dec-hw.o
mtk-vcodec-dec-y := vdec/vdec_h264_if.o \
vdec/vdec_vp8_if.o \
@@ -16,6 +17,8 @@ mtk-vcodec-dec-y := vdec/vdec_h264_if.o \
mtk_vcodec_dec_stateful.o \
mtk_vcodec_dec_stateless.o \
+mtk-vcodec-dec-hw-y := mtk_vcodec_dec_hw.o
+
mtk-vcodec-dec-common-y := mtk_vcodec_dec_pm.o
mtk-vcodec-enc-y := venc/venc_vp8_if.o \
@@ -18,19 +18,49 @@
#include "mtk_vcodec_drv.h"
#include "mtk_vcodec_dec.h"
+#include "mtk_vcodec_dec_hw.h"
#include "mtk_vcodec_dec_pm.h"
#include "mtk_vcodec_intr.h"
-#include "mtk_vcodec_util.h"
#include "mtk_vcodec_fw.h"
-#define VDEC_HW_ACTIVE 0x10
-#define VDEC_IRQ_CFG 0x11
-#define VDEC_IRQ_CLR 0x10
-#define VDEC_IRQ_CFG_REG 0xa4
-
module_param(mtk_v4l2_dbg_level, int, 0644);
module_param(mtk_vcodec_dbg, bool, 0644);
+static int mtk_vcodec_comp_device_check(struct mtk_vcodec_ctx *ctx)
+ {
+ struct mtk_vcodec_dev *vdec_dev = ctx->dev;
+ struct platform_device *pdev = vdec_dev->plat_dev;
+ struct device_node *comp_node;
+ enum mtk_vdec_hw_id comp_idx;
+ const struct of_device_id *of_id;
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(mtk_vdec_hw_match); i++) {
+ of_id = &mtk_vdec_hw_match[i];
+ comp_node = of_find_compatible_node(NULL, NULL,
+ of_id->compatible);
+ if (!comp_node)
+ continue;
+
+ if (!of_device_is_available(comp_node)) {
+ of_node_put(comp_node);
+ dev_err(&pdev->dev, "Fail to get MMSYS node\n");
+ continue;
+ }
+
+ comp_idx = (enum mtk_vdec_hw_id)of_id->data;
+ vdec_dev->component_node[comp_idx] = comp_node;
+
+ if (!test_bit(comp_idx, vdec_dev->hardware_bitmap)) {
+ dev_err(&pdev->dev, "Vdec comp_idx is not ready %d.",
+ comp_idx);
+ return -EINVAL;
+ }
+ }
+
+ return 0;
+}
+
static irqreturn_t mtk_vcodec_dec_irq_handler(int irq, void *priv)
{
struct mtk_vcodec_dev *dev = priv;
@@ -95,6 +125,41 @@ static int mtk_vcodec_get_reg_bases(struct mtk_vcodec_dev *dev)
return 0;
}
+static int mtk_vcodec_init_dec_params(struct mtk_vcodec_dev *dev)
+{
+ struct platform_device *pdev = dev->plat_dev;
+ int ret;
+
+ ret = mtk_vcodec_get_reg_bases(dev);
+ if (ret)
+ return ret;
+
+ if (!dev->vdec_pdata->is_subdev_supported) {
+ dev->dec_irq = platform_get_irq(pdev, 0);
+ if (dev->dec_irq < 0) {
+ dev_err(&pdev->dev, "failed to get irq number");
+ return dev->dec_irq;
+ }
+
+ irq_set_status_flags(dev->dec_irq, IRQ_NOAUTOEN);
+ ret = devm_request_irq(&pdev->dev, dev->dec_irq,
+ mtk_vcodec_dec_irq_handler, 0, pdev->name, dev);
+ if (ret) {
+ dev_err(&pdev->dev, "failed to install dev->dec_irq %d (%d)",
+ dev->dec_irq, ret);
+ return ret;
+ }
+
+ ret = mtk_vcodec_init_dec_pm(pdev, &dev->pm);
+ if (ret < 0) {
+ dev_err(&pdev->dev, "failed to get mt vcodec clock source");
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
static int fops_vcodec_open(struct file *file)
{
struct mtk_vcodec_dev *dev = video_drvdata(file);
@@ -116,6 +181,12 @@ static int fops_vcodec_open(struct file *file)
init_waitqueue_head(&ctx->queue);
mutex_init(&ctx->lock);
+ ret = mtk_vcodec_comp_device_check(ctx);
+ if (ret) {
+ mtk_v4l2_err("Failed to check vdec comp device.");
+ goto err_ctrls_setup;
+ }
+
ctx->type = MTK_INST_DECODER;
ret = dev->vdec_pdata->ctrls_setup(ctx);
if (ret) {
@@ -220,7 +291,6 @@ static int mtk_vcodec_probe(struct platform_device *pdev)
{
struct mtk_vcodec_dev *dev;
struct video_device *vfd_dec;
- struct resource *res;
phandle rproc_phandle;
enum mtk_vcodec_fw_type fw_type;
int ret;
@@ -249,32 +319,10 @@ static int mtk_vcodec_probe(struct platform_device *pdev)
if (IS_ERR(dev->fw_handler))
return PTR_ERR(dev->fw_handler);
- ret = mtk_vcodec_init_dec_pm(dev->plat_dev, &dev->pm);
- if (ret < 0) {
- dev_err(&pdev->dev, "Failed to get mt vcodec clock source");
- goto err_dec_pm;
- }
-
- ret = mtk_vcodec_get_reg_bases(dev);
- if (ret)
- goto err_res;
-
- res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
- if (res == NULL) {
- dev_err(&pdev->dev, "failed to get irq resource");
- ret = -ENOENT;
- goto err_res;
- }
-
- dev->dec_irq = platform_get_irq(pdev, 0);
- irq_set_status_flags(dev->dec_irq, IRQ_NOAUTOEN);
- ret = devm_request_irq(&pdev->dev, dev->dec_irq,
- mtk_vcodec_dec_irq_handler, 0, pdev->name, dev);
+ ret = mtk_vcodec_init_dec_params(dev);
if (ret) {
- dev_err(&pdev->dev, "Failed to install dev->dec_irq %d (%d)",
- dev->dec_irq,
- ret);
- goto err_res;
+ dev_err(&pdev->dev, "Failed to init pm and registers");
+ goto err_dec_pm;
}
mutex_init(&dev->dec_mutex);
@@ -329,6 +377,13 @@ static int mtk_vcodec_probe(struct platform_device *pdev)
goto err_event_workq;
}
+ ret = of_platform_populate(pdev->dev.of_node, NULL, NULL,
+ &pdev->dev);
+ if (ret) {
+ mtk_v4l2_err("Master device of_platform_populate failed.");
+ goto err_event_workq;
+ }
+
if (dev->vdec_pdata->uses_stateless_api) {
dev->mdev_dec.dev = &pdev->dev;
strscpy(dev->mdev_dec.model, MTK_VCODEC_DEC_NAME,
new file mode 100644
@@ -0,0 +1,166 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2021 MediaTek Inc.
+ * Author: Yunfei Dong <yunfei.dong@mediatek.com>
+ */
+
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/slab.h>
+
+#include "mtk_vcodec_drv.h"
+#include "mtk_vcodec_dec.h"
+#include "mtk_vcodec_dec_hw.h"
+#include "mtk_vcodec_dec_pm.h"
+#include "mtk_vcodec_intr.h"
+#include "mtk_vcodec_util.h"
+
+const struct of_device_id mtk_vdec_hw_match[] = {
+ {
+ .compatible = "mediatek,mtk-vcodec-lat",
+ .data = (void *)MTK_VDEC_LAT0,
+ },
+ {
+ .compatible = "mediatek,mtk-vcodec-core",
+ .data = (void *)MTK_VDEC_CORE,
+ },
+ {},
+};
+EXPORT_SYMBOL_GPL(mtk_vdec_hw_match);
+
+MODULE_DEVICE_TABLE(of, mtk_vdec_hw_match);
+
+static irqreturn_t mtk_vdec_hw_irq_handler(int irq, void *priv)
+{
+ struct mtk_vdec_hw_dev *dev = priv;
+ struct mtk_vcodec_ctx *ctx;
+ u32 cg_status;
+ unsigned int dec_done_status;
+ void __iomem *vdec_misc_addr = dev->reg_base[VDEC_COMP_MISC] +
+ VDEC_IRQ_CFG_REG;
+
+ ctx = mtk_vcodec_get_curr_ctx(dev->master_dev);
+
+ /* check if HW active or not */
+ cg_status = readl(dev->reg_base[VDEC_COMP_SYS]);
+ if (cg_status & VDEC_HW_ACTIVE) {
+ mtk_v4l2_err("vdec active is not 0x0 (0x%08x)",
+ cg_status);
+ return IRQ_HANDLED;
+ }
+
+ dec_done_status = readl(vdec_misc_addr);
+ if ((dec_done_status & MTK_VDEC_IRQ_STATUS_DEC_SUCCESS) !=
+ MTK_VDEC_IRQ_STATUS_DEC_SUCCESS)
+ return IRQ_HANDLED;
+
+ /* clear interrupt */
+ writel(dec_done_status | VDEC_IRQ_CFG, vdec_misc_addr);
+ writel(dec_done_status & ~VDEC_IRQ_CLR, vdec_misc_addr);
+
+ wake_up_ctx(ctx, MTK_INST_IRQ_RECEIVED);
+
+ mtk_v4l2_debug(3, "wake up ctx %d, dec_done_status=%x",
+ ctx->id, dec_done_status);
+
+ return IRQ_HANDLED;
+}
+
+static int mtk_vdec_hw_init_irq(struct mtk_vdec_hw_dev *dev)
+{
+ struct platform_device *pdev = dev->plat_dev;
+ int ret;
+
+ dev->dec_irq = platform_get_irq(pdev, 0);
+ if (dev->dec_irq < 0) {
+ dev_err(&pdev->dev, "Failed to get irq resource");
+ return dev->dec_irq;
+ }
+
+ irq_set_status_flags(dev->dec_irq, IRQ_NOAUTOEN);
+ ret = devm_request_irq(&pdev->dev, dev->dec_irq,
+ mtk_vdec_hw_irq_handler, 0, pdev->name, dev);
+ if (ret) {
+ dev_err(&pdev->dev, "Failed to install dev->dec_irq %d (%d)",
+ dev->dec_irq, ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int mtk_vdec_hw_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct mtk_vdec_hw_dev *comp_dev;
+ struct mtk_vcodec_dev *master_dev;
+ const struct of_device_id *of_id;
+ int comp_idx;
+ int ret;
+
+ if (!dev->parent)
+ return -EPROBE_DEFER;
+
+ master_dev = dev_get_drvdata(dev->parent);
+ if (!master_dev)
+ return -EPROBE_DEFER;
+
+ comp_dev = devm_kzalloc(dev, sizeof(*comp_dev), GFP_KERNEL);
+ if (!comp_dev)
+ return -ENOMEM;
+
+ comp_dev->plat_dev = pdev;
+ ret = mtk_vcodec_init_dec_pm(pdev, &comp_dev->pm);
+ if (ret)
+ return ret;
+
+ comp_dev->reg_base[VDEC_COMP_MISC] =
+ devm_platform_ioremap_resource_byname(pdev, "misc");
+ if (IS_ERR((__force void *)comp_dev->reg_base[VDEC_COMP_MISC])) {
+ ret = PTR_ERR((__force void *)comp_dev->reg_base[VDEC_COMP_MISC]);
+ goto err;
+ }
+
+ ret = mtk_vdec_hw_init_irq(comp_dev);
+ if (ret)
+ goto err;
+
+ of_id = of_match_device(mtk_vdec_hw_match, dev);
+ if (!of_id) {
+ dev_err(dev, "Can't get vdec comp device id.\n");
+ ret = -EINVAL;
+ goto err;
+ }
+
+ comp_idx = (enum mtk_vdec_hw_id)of_id->data;
+ if (comp_idx < MTK_VDEC_HW_MAX) {
+ master_dev->comp_dev[comp_idx] = comp_dev;
+ comp_dev->comp_idx = comp_idx;
+ comp_dev->master_dev = master_dev;
+ comp_dev->reg_base[VDEC_COMP_SYS] =
+ master_dev->reg_base[VDEC_COMP_SYS];
+ set_bit(comp_dev->comp_idx, master_dev->hardware_bitmap);
+ }
+
+ platform_set_drvdata(pdev, comp_dev);
+ return 0;
+err:
+ mtk_vcodec_release_dec_pm(&comp_dev->pm);
+ return ret;
+}
+
+static struct platform_driver mtk_vdec_driver = {
+ .probe = mtk_vdec_hw_probe,
+ .driver = {
+ .name = "mtk-vdec-comp",
+ .of_match_table = mtk_vdec_hw_match,
+ },
+};
+
+module_platform_driver(mtk_vdec_driver);
+
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("Mediatek video decoder hardware driver");
new file mode 100644
@@ -0,0 +1,51 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2021 MediaTek Inc.
+ * Author: Yunfei Dong <yunfei.dong@mediatek.com>
+ */
+
+#ifndef _MTK_VCODEC_DEC_HW_H_
+#define _MTK_VCODEC_DEC_HW_H_
+
+#include <linux/io.h>
+#include <linux/platform_device.h>
+
+#include "mtk_vcodec_drv.h"
+
+#define VDEC_HW_ACTIVE 0x10
+#define VDEC_IRQ_CFG 0x11
+#define VDEC_IRQ_CLR 0x10
+#define VDEC_IRQ_CFG_REG 0xa4
+
+extern const struct of_device_id mtk_vdec_hw_match[MTK_VDEC_HW_MAX];
+
+/**
+ * enum mtk_comp_hw_reg_idx - component register base index
+ */
+enum mtk_comp_hw_reg_idx {
+ VDEC_COMP_SYS,
+ VDEC_COMP_MISC,
+ VDEC_COMP_MAX
+};
+
+/**
+ * struct mtk_vdec_hw_dev - vdec hardware driver data
+ * @plat_dev: platform device
+ * @master_dev: master device
+ * @reg_base: Mapped address of MTK Vcodec registers.
+ *
+ * @dec_irq: decoder irq resource
+ * @pm: power management control
+ * @comp_idx: each hardware index
+ */
+struct mtk_vdec_hw_dev {
+ struct platform_device *plat_dev;
+ struct mtk_vcodec_dev *master_dev;
+ void __iomem *reg_base[VDEC_COMP_MAX];
+
+ int dec_irq;
+ struct mtk_vcodec_pm pm;
+ int comp_idx;
+};
+
+#endif /* _MTK_VCODEC_DEC_HW_H_ */
@@ -625,4 +625,5 @@ const struct mtk_vcodec_dec_pdata mtk_vdec_8173_pdata = {
.num_framesizes = NUM_SUPPORTED_FRAMESIZE,
.worker = mtk_vdec_worker,
.flush_decoder = mtk_vdec_flush_decoder,
+ .is_subdev_supported = false,
};
@@ -357,6 +357,7 @@ const struct mtk_vcodec_dec_pdata mtk_vdec_8183_pdata = {
.uses_stateless_api = true,
.worker = mtk_vdec_worker,
.flush_decoder = mtk_vdec_flush_decoder,
+ .is_subdev_supported = false,
};
const struct mtk_vcodec_dec_pdata mtk_lat_sig_core_pdata = {
@@ -373,4 +374,5 @@ const struct mtk_vcodec_dec_pdata mtk_lat_sig_core_pdata = {
.uses_stateless_api = true,
.worker = mtk_vdec_worker,
.flush_decoder = mtk_vdec_flush_decoder,
+ .is_subdev_supported = true,
};
@@ -93,6 +93,17 @@ enum mtk_fmt_type {
MTK_FMT_FRAME = 2,
};
+/**
+ * struct mtk_vdec_hw_id - Hardware index used to separate
+ * different hardware
+ */
+enum mtk_vdec_hw_id {
+ MTK_VDEC_CORE,
+ MTK_VDEC_LAT0,
+ MTK_VDEC_LAT1,
+ MTK_VDEC_HW_MAX,
+};
+
/*
* struct mtk_video_fmt - Structure used to store information about pixelformats
*/
@@ -332,6 +343,7 @@ enum mtk_chip {
*
* @chip: chip this decoder is compatible with
*
+ * @is_subdev_supported: whether support parent-node architecture(subdev)
* @uses_stateless_api: whether the decoder uses the stateless API with requests
*/
@@ -353,6 +365,7 @@ struct mtk_vcodec_dec_pdata {
enum mtk_chip chip;
+ bool is_subdev_supported;
bool uses_stateless_api;
};
@@ -423,6 +436,11 @@ struct mtk_vcodec_enc_pdata {
* @pm: power management control
* @dec_capability: used to identify decode capability, ex: 4k
* @enc_capability: used to identify encode capability
+ *
+ * @comp_dev: component hardware device
+ * @component_node: component node
+ *
+ * @hardware_bitmap: used to record hardware is ready or not
*/
struct mtk_vcodec_dev {
struct v4l2_device v4l2_dev;
@@ -460,6 +478,11 @@ struct mtk_vcodec_dev {
struct mtk_vcodec_pm pm;
unsigned int dec_capability;
unsigned int enc_capability;
+
+ void *comp_dev[MTK_VDEC_HW_MAX];
+ struct device_node *component_node[MTK_VDEC_HW_MAX];
+
+ DECLARE_BITMAP(hardware_bitmap, MTK_VDEC_HW_MAX);
};
static inline struct mtk_vcodec_ctx *fh_to_ctx(struct v4l2_fh *fh)
Manage each hardware information which includes irq/power/clk. The hardware includes LAT0, LAT1 and CORE. Signed-off-by: Yunfei Dong <yunfei.dong@mediatek.com> --- v8: fix many comments --- drivers/media/platform/mtk-vcodec/Makefile | 5 +- .../platform/mtk-vcodec/mtk_vcodec_dec_drv.c | 119 +++++++++---- .../platform/mtk-vcodec/mtk_vcodec_dec_hw.c | 166 ++++++++++++++++++ .../platform/mtk-vcodec/mtk_vcodec_dec_hw.h | 51 ++++++ .../mtk-vcodec/mtk_vcodec_dec_stateful.c | 1 + .../mtk-vcodec/mtk_vcodec_dec_stateless.c | 2 + .../platform/mtk-vcodec/mtk_vcodec_drv.h | 23 +++ 7 files changed, 334 insertions(+), 33 deletions(-) create mode 100644 drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_hw.c create mode 100644 drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_hw.h