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[10/12] arm64: dts: mt8195: Add APU power nodes

Message ID 20211210175223.31131-11-flora.fu@mediatek.com (mailing list archive)
State New, archived
Headers show
Series MediaTek MT8195 APU | expand

Commit Message

Flora Fu Dec. 10, 2021, 5:52 p.m. UTC 
Add APU power node for MT8195.

Signed-off-by: Flora Fu <flora.fu@mediatek.com>

---
 arch/arm64/boot/dts/mediatek/mt8195.dtsi | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index 8f4f56e2f08c..5ab4b2fba0e9 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -1450,6 +1450,25 @@ 
 			};
 		};
 
+		apusys_power: apusys_power@190f1000 {
+			compatible = "mediatek,mt8195-apu-power";
+			reg = <0 0x190f1000 0 0x1000>,
+			      <0 0x19000600 0 0x100>;
+			reg-names = "apu_pcu",
+				    "apu_spare";
+			power-domains = <&apuspm 0>;
+
+			apu_combo_iommu0 {
+				compatible = "mediatek,apu_combo_iommu0";
+				iommus = <&iommu_apu0 IOMMU_PORT_APU_DATA>;
+			};
+
+			apu_combo_iommu1 {
+				compatible = "mediatek,apu_combo_iommu1";
+				iommus = <&iommu_apu1 IOMMU_PORT_APU_DATA>;
+			};
+		};
+
 		apusys_pll: clock-controller@190f3000 {
 			compatible = "mediatek,mt8195-apusys_pll";
 			reg = <0 0x190f3000 0 0x1000>;