| Message ID | 20220218091633.9368-22-allen-kh.cheng@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add driver nodes for MT8192 SoC | expand |
Il 18/02/22 10:16, Allen-KH Cheng ha scritto: > Add dsi ndoe for mt8192 SoC. > > Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> > --- > arch/arm64/boot/dts/mediatek/mt8192.dtsi | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi > index 026f2d8141b0..1f1555fd18f5 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi > @@ -1350,6 +1350,19 @@ > clocks = <&mmsys CLK_MM_DISP_DITHER0>; > }; > > + dsi0: dsi@14010000 { > + compatible = "mediatek,mt8183-dsi"; > + reg = <0 0x14010000 0 0x1000>; > + interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH 0>; > + mediatek,syscon-dsi = <&mmsys 0x140>; > + clocks = <&mmsys CLK_MM_DSI0>, > + <&mmsys CLK_MM_DSI_DSI0>, > + <&mipi_tx0>; > + clock-names = "engine", "digital", "hs"; > + phys = <&mipi_tx0>; > + phy-names = "dphy"; ...please: status = "disabled"; > + }; > + > ovl_2l2: ovl@14014000 { > compatible = "mediatek,mt8192-disp-ovl-2l"; > reg = <0 0x14014000 0 0x1000>;
On Fri, 2022-02-18 at 13:56 +0100, AngeloGioacchino Del Regno wrote: > Il 18/02/22 10:16, Allen-KH Cheng ha scritto: > > Add dsi ndoe for mt8192 SoC. > > > > Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> > > --- > > arch/arm64/boot/dts/mediatek/mt8192.dtsi | 13 +++++++++++++ > > 1 file changed, 13 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi > > b/arch/arm64/boot/dts/mediatek/mt8192.dtsi > > index 026f2d8141b0..1f1555fd18f5 100644 > > --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi > > +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi > > @@ -1350,6 +1350,19 @@ > > clocks = <&mmsys CLK_MM_DISP_DITHER0>; > > }; > > > > + dsi0: dsi@14010000 { > > + compatible = "mediatek,mt8183-dsi"; > > + reg = <0 0x14010000 0 0x1000>; > > + interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH > > 0>; > > + mediatek,syscon-dsi = <&mmsys 0x140>; > > + clocks = <&mmsys CLK_MM_DSI0>, > > + <&mmsys CLK_MM_DSI_DSI0>, > > + <&mipi_tx0>; > > + clock-names = "engine", "digital", "hs"; > > + phys = <&mipi_tx0>; > > + phy-names = "dphy"; > > ...please: > status = "disabled"; > Hi Angelo, It's the same problem with mipi_tx0. I will update in next version. Many thanks, Allen > > + }; > > + > > ovl_2l2: ovl@14014000 { > > compatible = "mediatek,mt8192-disp-ovl-2l"; > > reg = <0 0x14014000 0 0x1000>;
On Fri, Feb 18, 2022 at 05:16:31PM +0800, Allen-KH Cheng wrote: > Add dsi ndoe for mt8192 SoC. > > Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> > --- > arch/arm64/boot/dts/mediatek/mt8192.dtsi | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi > index 026f2d8141b0..1f1555fd18f5 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi > @@ -1350,6 +1350,19 @@ > clocks = <&mmsys CLK_MM_DISP_DITHER0>; > }; > > + dsi0: dsi@14010000 { > + compatible = "mediatek,mt8183-dsi"; > + reg = <0 0x14010000 0 0x1000>; > + interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH 0>; > + mediatek,syscon-dsi = <&mmsys 0x140>; > + clocks = <&mmsys CLK_MM_DSI0>, > + <&mmsys CLK_MM_DSI_DSI0>, > + <&mipi_tx0>; Please fix the indentation. > + clock-names = "engine", "digital", "hs"; > + phys = <&mipi_tx0>; > + phy-names = "dphy"; > + }; > + > ovl_2l2: ovl@14014000 { > compatible = "mediatek,mt8192-disp-ovl-2l"; > reg = <0 0x14014000 0 0x1000>; > -- > 2.18.0 > >
On Tue, 2022-02-22 at 18:16 -0500, Nícolas F. R. A. Prado wrote: > On Fri, Feb 18, 2022 at 05:16:31PM +0800, Allen-KH Cheng wrote: > > Add dsi ndoe for mt8192 SoC. > > > > Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> > > --- > > arch/arm64/boot/dts/mediatek/mt8192.dtsi | 13 +++++++++++++ > > 1 file changed, 13 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi > > b/arch/arm64/boot/dts/mediatek/mt8192.dtsi > > index 026f2d8141b0..1f1555fd18f5 100644 > > --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi > > +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi > > @@ -1350,6 +1350,19 @@ > > clocks = <&mmsys CLK_MM_DISP_DITHER0>; > > }; > > > > + dsi0: dsi@14010000 { > > + compatible = "mediatek,mt8183-dsi"; > > + reg = <0 0x14010000 0 0x1000>; > > + interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH > > 0>; > > + mediatek,syscon-dsi = <&mmsys 0x140>; > > + clocks = <&mmsys CLK_MM_DSI0>, > > + <&mmsys CLK_MM_DSI_DSI0>, > > + <&mipi_tx0>; > > Please fix the indentation. HI Nícolas, I will fix this in next version, Thanks. > > > + clock-names = "engine", "digital", "hs"; > > + phys = <&mipi_tx0>; > > + phy-names = "dphy"; > > + }; > > + > > ovl_2l2: ovl@14014000 { > > compatible = "mediatek,mt8192-disp-ovl-2l"; > > reg = <0 0x14014000 0 0x1000>; > > -- > > 2.18.0 > > > >
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi index 026f2d8141b0..1f1555fd18f5 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -1350,6 +1350,19 @@ clocks = <&mmsys CLK_MM_DISP_DITHER0>; }; + dsi0: dsi@14010000 { + compatible = "mediatek,mt8183-dsi"; + reg = <0 0x14010000 0 0x1000>; + interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH 0>; + mediatek,syscon-dsi = <&mmsys 0x140>; + clocks = <&mmsys CLK_MM_DSI0>, + <&mmsys CLK_MM_DSI_DSI0>, + <&mipi_tx0>; + clock-names = "engine", "digital", "hs"; + phys = <&mipi_tx0>; + phy-names = "dphy"; + }; + ovl_2l2: ovl@14014000 { compatible = "mediatek,mt8192-disp-ovl-2l"; reg = <0 0x14014000 0 0x1000>;
Add dsi ndoe for mt8192 SoC. Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+)