| Message ID | 20220218091633.9368-7-allen-kh.cheng@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add driver nodes for MT8192 SoC | expand |
Il 18/02/22 10:16, Allen-KH Cheng ha scritto: > Add xhci node for mt8192 SoC. > > Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> > --- > arch/arm64/boot/dts/mediatek/mt8192.dtsi | 25 ++++++++++++++++++++++++ > 1 file changed, 25 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi > index 61aadd7bd397..ce18d692175f 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi > @@ -875,6 +875,31 @@ > #clock-cells = <1>; > }; > > + u3phy0: usb-phy@11e40000 { > + compatible = "mediatek,mt8192-tphy", > + "mediatek,generic-tphy-v2"; > + #address-cells = <2>; > + #size-cells = <2>; > + ranges; This can be better: #address-cells = <1>; #size-cells = <1>; ranges = <0 0 0x11e40000 0x1000> > + status = "okay"; > + > + u2port0: usb-phy@11e40000 { u2port0: usb-phy@0 { > + reg = <0 0x11e40000 0 0x700>; reg = <0x0 0x700>; > + clocks = <&clk26m>; > + clock-names = "ref"; > + #phy-cells = <1>; > + status = "okay"; > + }; > + > + u3port0: usb-phy@11e40700 { > + reg = <0 0x11e40700 0 0x900>; u3port0: usb-phy@700 { reg = <0x700 0x900>; > + clocks = <&clk26m>; > + clock-names = "ref"; > + #phy-cells = <1>; > + status = "okay"; > + }; > + }; > + > i2c0: i2c@11f00000 { > compatible = "mediatek,mt8192-i2c"; > reg = <0 0x11f00000 0 0x1000>, Thanks, Angelo
On Fri, 2022-02-18 at 13:55 +0100, AngeloGioacchino Del Regno wrote: > Il 18/02/22 10:16, Allen-KH Cheng ha scritto: > > Add xhci node for mt8192 SoC. > > > > Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> > > --- > > arch/arm64/boot/dts/mediatek/mt8192.dtsi | 25 > > ++++++++++++++++++++++++ > > 1 file changed, 25 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi > > b/arch/arm64/boot/dts/mediatek/mt8192.dtsi > > index 61aadd7bd397..ce18d692175f 100644 > > --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi > > +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi > > @@ -875,6 +875,31 @@ > > #clock-cells = <1>; > > }; > > > > + u3phy0: usb-phy@11e40000 { > > + compatible = "mediatek,mt8192-tphy", > > + "mediatek,generic-tphy-v2"; > > + #address-cells = <2>; > > + #size-cells = <2>; > > + ranges; > > This can be better: > #address-cells = <1>; > > #size-cells = <1>; > ranges = <0 0 0x11e40000 0x1000> > > Hi Angelo, Thanks for your surgestion, this's good for me, I will update in next version. Best regards, Allen > > + status = "okay"; > > + > > + u2port0: usb-phy@11e40000 { > > u2port0: usb-phy@0 { > > > + reg = <0 0x11e40000 0 0x700>; > > reg = <0x0 0x700>; > > > + clocks = <&clk26m>; > > + clock-names = "ref"; > > + #phy-cells = <1>; > > + status = "okay"; > > + }; > > + > > + u3port0: usb-phy@11e40700 { > > + reg = <0 0x11e40700 0 0x900>; > > u3port0: usb-phy@700 { > reg = <0x700 0x900>; > > > + clocks = <&clk26m>; > > + clock-names = "ref"; > > + #phy-cells = <1>; > > + status = "okay"; > > + }; > > + }; > > + > > i2c0: i2c@11f00000 { > > compatible = "mediatek,mt8192-i2c"; > > reg = <0 0x11f00000 0 0x1000>, > > Thanks, > Angelo
On Fri, Feb 18, 2022 at 05:16:16PM +0800, Allen-KH Cheng wrote: > Add xhci node for mt8192 SoC. > > Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> > --- > arch/arm64/boot/dts/mediatek/mt8192.dtsi | 25 ++++++++++++++++++++++++ > 1 file changed, 25 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi > index 61aadd7bd397..ce18d692175f 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi > @@ -875,6 +875,31 @@ > #clock-cells = <1>; > }; > > + u3phy0: usb-phy@11e40000 { According to Documentation/devicetree/bindings/phy/mediatek,tphy.yaml, this node should be called t-phy. Only the child nodes should be usb-phy. > + compatible = "mediatek,mt8192-tphy", > + "mediatek,generic-tphy-v2"; > + #address-cells = <2>; > + #size-cells = <2>; > + ranges; > + status = "okay"; "okay" is already the default status, so you can drop this line, as well as the ones on the child nodes below. > + > + u2port0: usb-phy@11e40000 { > + reg = <0 0x11e40000 0 0x700>; > + clocks = <&clk26m>; > + clock-names = "ref"; > + #phy-cells = <1>; > + status = "okay"; > + }; > + > + u3port0: usb-phy@11e40700 { > + reg = <0 0x11e40700 0 0x900>; > + clocks = <&clk26m>; > + clock-names = "ref"; > + #phy-cells = <1>; > + status = "okay"; > + }; > + }; > + > i2c0: i2c@11f00000 { > compatible = "mediatek,mt8192-i2c"; > reg = <0 0x11f00000 0 0x1000>, > -- > 2.18.0 > >
On Tue, 2022-02-22 at 15:10 -0500, Nícolas F. R. A. Prado wrote: > On Fri, Feb 18, 2022 at 05:16:16PM +0800, Allen-KH Cheng wrote: > > Add xhci node for mt8192 SoC. > > > > Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> > > --- > > arch/arm64/boot/dts/mediatek/mt8192.dtsi | 25 > > ++++++++++++++++++++++++ > > 1 file changed, 25 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi > > b/arch/arm64/boot/dts/mediatek/mt8192.dtsi > > index 61aadd7bd397..ce18d692175f 100644 > > --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi > > +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi > > @@ -875,6 +875,31 @@ > > #clock-cells = <1>; > > }; > > > > + u3phy0: usb-phy@11e40000 { > > According to > Documentation/devicetree/bindings/phy/mediatek,tphy.yaml, this node > should be called t-phy. Only the child nodes should be usb-phy. > Hi Nícolas, I think it should be "u3phy0: t-phy@11e40000". am I right? Many thanks, Allen > > + compatible = "mediatek,mt8192-tphy", > > + "mediatek,generic-tphy-v2"; > > + #address-cells = <2>; > > + #size-cells = <2>; > > + ranges; > > + status = "okay"; > > "okay" is already the default status, so you can drop this line, as > well as the > ones on the child nodes below. > > > + > > + u2port0: usb-phy@11e40000 { > > + reg = <0 0x11e40000 0 0x700>; > > + clocks = <&clk26m>; > > + clock-names = "ref"; > > + #phy-cells = <1>; > > + status = "okay"; > > + }; > > + > > + u3port0: usb-phy@11e40700 { > > + reg = <0 0x11e40700 0 0x900>; > > + clocks = <&clk26m>; > > + clock-names = "ref"; > > + #phy-cells = <1>; > > + status = "okay"; > > + }; > > + }; > > + > > i2c0: i2c@11f00000 { > > compatible = "mediatek,mt8192-i2c"; > > reg = <0 0x11f00000 0 0x1000>, > > -- > > 2.18.0 > > > >
On Wed, Feb 23, 2022 at 09:24:12PM +0800, allen-kh.cheng wrote: > On Tue, 2022-02-22 at 15:10 -0500, Nícolas F. R. A. Prado wrote: > > On Fri, Feb 18, 2022 at 05:16:16PM +0800, Allen-KH Cheng wrote: > > > Add xhci node for mt8192 SoC. > > > > > > Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> > > > --- > > > arch/arm64/boot/dts/mediatek/mt8192.dtsi | 25 > > > ++++++++++++++++++++++++ > > > 1 file changed, 25 insertions(+) > > > > > > diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi > > > b/arch/arm64/boot/dts/mediatek/mt8192.dtsi > > > index 61aadd7bd397..ce18d692175f 100644 > > > --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi > > > +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi > > > @@ -875,6 +875,31 @@ > > > #clock-cells = <1>; > > > }; > > > > > > + u3phy0: usb-phy@11e40000 { > > > > According to > > Documentation/devicetree/bindings/phy/mediatek,tphy.yaml, this node > > should be called t-phy. Only the child nodes should be usb-phy. > > > Hi Nícolas, > > I think it should be "u3phy0: t-phy@11e40000". am I right? Yes, that's it.
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi index 61aadd7bd397..ce18d692175f 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -875,6 +875,31 @@ #clock-cells = <1>; }; + u3phy0: usb-phy@11e40000 { + compatible = "mediatek,mt8192-tphy", + "mediatek,generic-tphy-v2"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + status = "okay"; + + u2port0: usb-phy@11e40000 { + reg = <0 0x11e40000 0 0x700>; + clocks = <&clk26m>; + clock-names = "ref"; + #phy-cells = <1>; + status = "okay"; + }; + + u3port0: usb-phy@11e40700 { + reg = <0 0x11e40700 0 0x900>; + clocks = <&clk26m>; + clock-names = "ref"; + #phy-cells = <1>; + status = "okay"; + }; + }; + i2c0: i2c@11f00000 { compatible = "mediatek,mt8192-i2c"; reg = <0 0x11f00000 0 0x1000>,
Add xhci node for mt8192 SoC. Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 25 ++++++++++++++++++++++++ 1 file changed, 25 insertions(+)