Message ID | 20220318144534.17996-12-allen-kh.cheng@mediatek.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Add driver nodes for MT8192 SoC | expand |
Il 18/03/22 15:45, Allen-KH Cheng ha scritto: > Add efuse node for mt8192 SoC > > Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > --- > arch/arm64/boot/dts/mediatek/mt8192.dtsi | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) >
On Fri, Mar 18, 2022 at 10:45:23PM +0800, Allen-KH Cheng wrote: > Add efuse node for mt8192 SoC > > Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by: NĂcolas F. R. A. Prado <nfraprado@collabora.com> > --- > arch/arm64/boot/dts/mediatek/mt8192.dtsi | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi > index 75c21edccf85..6220d6962f58 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi > @@ -937,6 +937,21 @@ > status = "disabled"; > }; > > + efuse: efuse@11c10000 { > + compatible = "mediatek,efuse"; > + reg = <0 0x11c10000 0 0x1000>; > + #address-cells = <1>; > + #size-cells = <1>; > + > + lvts_e_data1: data1@1c0 { > + reg = <0x1c0 0x58>; > + }; > + > + svs_calibration: calib@580 { > + reg = <0x580 0x68>; > + }; > + }; > + > i2c3: i2c@11cb0000 { > compatible = "mediatek,mt8192-i2c"; > reg = <0 0x11cb0000 0 0x1000>, > -- > 2.18.0 > >
On 18/03/2022 15:45, Allen-KH Cheng wrote: > Add efuse node for mt8192 SoC > > Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Applied thanks > --- > arch/arm64/boot/dts/mediatek/mt8192.dtsi | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi > index 75c21edccf85..6220d6962f58 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi > @@ -937,6 +937,21 @@ > status = "disabled"; > }; > > + efuse: efuse@11c10000 { > + compatible = "mediatek,efuse"; > + reg = <0 0x11c10000 0 0x1000>; > + #address-cells = <1>; > + #size-cells = <1>; > + > + lvts_e_data1: data1@1c0 { > + reg = <0x1c0 0x58>; > + }; > + > + svs_calibration: calib@580 { > + reg = <0x580 0x68>; > + }; > + }; > + > i2c3: i2c@11cb0000 { > compatible = "mediatek,mt8192-i2c"; > reg = <0 0x11cb0000 0 0x1000>,
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi index 75c21edccf85..6220d6962f58 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -937,6 +937,21 @@ status = "disabled"; }; + efuse: efuse@11c10000 { + compatible = "mediatek,efuse"; + reg = <0 0x11c10000 0 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + + lvts_e_data1: data1@1c0 { + reg = <0x1c0 0x58>; + }; + + svs_calibration: calib@580 { + reg = <0x580 0x68>; + }; + }; + i2c3: i2c@11cb0000 { compatible = "mediatek,mt8192-i2c"; reg = <0 0x11cb0000 0 0x1000>,
Add efuse node for mt8192 SoC Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+)