Message ID | 20220321013922.24067-3-leilk.liu@mediatek.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | spi: mediatek: add single/quad mode support | expand |
On Mon, 21 Mar 2022 09:39:21 +0800, Leilk Liu wrote: > this patch support hclk for AHB bus. > > Signed-off-by: Leilk Liu <leilk.liu@mediatek.com> > Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > --- > .../devicetree/bindings/spi/mediatek,spi-mt65xx.yaml | 4 ++++ > 1 file changed, 4 insertions(+) > Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/spi/mediatek,spi-mt65xx.yaml b/Documentation/devicetree/bindings/spi/mediatek,spi-mt65xx.yaml index 7247a177466b..ecb4a5002cc1 100644 --- a/Documentation/devicetree/bindings/spi/mediatek,spi-mt65xx.yaml +++ b/Documentation/devicetree/bindings/spi/mediatek,spi-mt65xx.yaml @@ -53,16 +53,20 @@ properties: maxItems: 1 clocks: + minItems: 3 items: - description: clock used for the parent clock - description: clock used for the muxes clock - description: clock used for the clock gate + - description: clock used for the AHB bus, this clock is optional clock-names: + minItems: 3 items: - const: parent-clk - const: sel-clk - const: spi-clk + - const: hclk mediatek,pad-select: $ref: /schemas/types.yaml#/definitions/uint32-array