From patchwork Mon Mar 21 01:39:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leilk Liu X-Patchwork-Id: 12786746 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EFDFDC433EF for ; Mon, 21 Mar 2022 01:40:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=X4/kGSfkP0DvOa+asbBl1FgqKq3WbiQNFaqPXfXjICk=; b=pPNqzgSAm0wDC/ xNBl5Pyc36OFQTnvvb1yY8aaEx4XRbolRWKxK8TjGt0wVZtZWMTIGU89SzyaxCgA8wvIAzLZkpahk vEktGJ+Le/EtIguJ2wNmCNu0G1KX7Bz/t50hSHsWgXzXE8tFwR07ojHo+RFSGgRMdsDmq34t2gapd CxzyxkXxTj7tb0wxZMJ5b8EngjAW/PzOqWQahiy+pO7pc+ysdY4y39WsM/IsgY8D+hdEvK3f4dsAS phzlbv1RRpODxyCJeSWPOBo4z5jc9lMjT7gs9FYwzlzCuA5oWrYz1xzSGNHnIpzFtfojQibrxjbsF Xw/uV5MLJV05mq+bNGHA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nW71c-006FlK-KK; Mon, 21 Mar 2022 01:40:00 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nW71O-006FgU-9w; Mon, 21 Mar 2022 01:39:48 +0000 X-UUID: b43031c5f98f4fee908502cb6beaee10-20220320 X-UUID: b43031c5f98f4fee908502cb6beaee10-20220320 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 694848967; Sun, 20 Mar 2022 18:39:41 -0700 Received: from mtkmbs07n1.mediatek.inc (172.21.101.16) by MTKMBS62DR.mediatek.inc (172.29.94.18) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sun, 20 Mar 2022 18:39:27 -0700 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 21 Mar 2022 09:39:26 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 21 Mar 2022 09:39:26 +0800 From: Leilk Liu To: Mark Brown CC: Rob Herring , Matthias Brugger , , , , , , Leilk Liu , AngeloGioacchino Del Regno Subject: [PATCH V6 3/3] spi: mediatek: support hclk Date: Mon, 21 Mar 2022 09:39:22 +0800 Message-ID: <20220321013922.24067-4-leilk.liu@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220321013922.24067-1-leilk.liu@mediatek.com> References: <20220321013922.24067-1-leilk.liu@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220320_183946_408555_F290AC65 X-CRM114-Status: GOOD ( 16.91 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org this patch adds hclk support. Signed-off-by: Leilk Liu Reviewed-by: AngeloGioacchino Del Regno --- drivers/spi/spi-mt65xx.c | 85 ++++++++++++++++++++++++++++++++-------- 1 file changed, 69 insertions(+), 16 deletions(-) diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c index 0f91c176b878..99ce570a88a7 100644 --- a/drivers/spi/spi-mt65xx.c +++ b/drivers/spi/spi-mt65xx.c @@ -129,7 +129,7 @@ struct mtk_spi { u32 state; int pad_num; u32 *pad_sel; - struct clk *parent_clk, *sel_clk, *spi_clk; + struct clk *parent_clk, *sel_clk, *spi_clk, *spi_hclk; struct spi_transfer *cur_transfer; u32 xfer_len; u32 num_xfered; @@ -1204,25 +1204,40 @@ static int mtk_spi_probe(struct platform_device *pdev) goto err_put_master; } + mdata->spi_hclk = devm_clk_get_optional(&pdev->dev, "hclk"); + if (IS_ERR(mdata->spi_hclk)) { + ret = PTR_ERR(mdata->spi_hclk); + dev_err(&pdev->dev, "failed to get hclk: %d\n", ret); + goto err_put_master; + } + + ret = clk_prepare_enable(mdata->spi_hclk); + if (ret < 0) { + dev_err(&pdev->dev, "failed to enable hclk (%d)\n", ret); + goto err_put_master; + } + ret = clk_prepare_enable(mdata->spi_clk); if (ret < 0) { dev_err(&pdev->dev, "failed to enable spi_clk (%d)\n", ret); - goto err_put_master; + goto err_disable_spi_hclk; } ret = clk_set_parent(mdata->sel_clk, mdata->parent_clk); if (ret < 0) { dev_err(&pdev->dev, "failed to clk_set_parent (%d)\n", ret); - clk_disable_unprepare(mdata->spi_clk); - goto err_put_master; + goto err_disable_spi_clk; } mdata->spi_clk_hz = clk_get_rate(mdata->spi_clk); - if (mdata->dev_comp->no_need_unprepare) + if (mdata->dev_comp->no_need_unprepare) { clk_disable(mdata->spi_clk); - else + clk_disable(mdata->spi_hclk); + } else { clk_disable_unprepare(mdata->spi_clk); + clk_disable_unprepare(mdata->spi_hclk); + } pm_runtime_enable(&pdev->dev); @@ -1262,6 +1277,10 @@ static int mtk_spi_probe(struct platform_device *pdev) err_disable_runtime_pm: pm_runtime_disable(&pdev->dev); +err_disable_spi_clk: + clk_disable_unprepare(mdata->spi_clk); +err_disable_spi_hclk: + clk_disable_unprepare(mdata->spi_hclk); err_put_master: spi_master_put(master); @@ -1277,8 +1296,10 @@ static int mtk_spi_remove(struct platform_device *pdev) mtk_spi_reset(mdata); - if (mdata->dev_comp->no_need_unprepare) + if (mdata->dev_comp->no_need_unprepare) { clk_unprepare(mdata->spi_clk); + clk_unprepare(mdata->spi_hclk); + } return 0; } @@ -1294,8 +1315,10 @@ static int mtk_spi_suspend(struct device *dev) if (ret) return ret; - if (!pm_runtime_suspended(dev)) + if (!pm_runtime_suspended(dev)) { clk_disable_unprepare(mdata->spi_clk); + clk_disable_unprepare(mdata->spi_hclk); + } return ret; } @@ -1312,11 +1335,20 @@ static int mtk_spi_resume(struct device *dev) dev_err(dev, "failed to enable spi_clk (%d)\n", ret); return ret; } + + ret = clk_prepare_enable(mdata->spi_hclk); + if (ret < 0) { + dev_err(dev, "failed to enable spi_hclk (%d)\n", ret); + clk_disable_unprepare(mdata->spi_clk); + return ret; + } } ret = spi_master_resume(master); - if (ret < 0) + if (ret < 0) { clk_disable_unprepare(mdata->spi_clk); + clk_disable_unprepare(mdata->spi_hclk); + } return ret; } @@ -1328,10 +1360,13 @@ static int mtk_spi_runtime_suspend(struct device *dev) struct spi_master *master = dev_get_drvdata(dev); struct mtk_spi *mdata = spi_master_get_devdata(master); - if (mdata->dev_comp->no_need_unprepare) + if (mdata->dev_comp->no_need_unprepare) { clk_disable(mdata->spi_clk); - else + clk_disable(mdata->spi_hclk); + } else { clk_disable_unprepare(mdata->spi_clk); + clk_disable_unprepare(mdata->spi_hclk); + } return 0; } @@ -1342,13 +1377,31 @@ static int mtk_spi_runtime_resume(struct device *dev) struct mtk_spi *mdata = spi_master_get_devdata(master); int ret; - if (mdata->dev_comp->no_need_unprepare) + if (mdata->dev_comp->no_need_unprepare) { ret = clk_enable(mdata->spi_clk); - else + if (ret < 0) { + dev_err(dev, "failed to enable spi_clk (%d)\n", ret); + return ret; + } + ret = clk_enable(mdata->spi_hclk); + if (ret < 0) { + dev_err(dev, "failed to enable spi_hclk (%d)\n", ret); + clk_disable(mdata->spi_clk); + return ret; + } + } else { ret = clk_prepare_enable(mdata->spi_clk); - if (ret < 0) { - dev_err(dev, "failed to enable spi_clk (%d)\n", ret); - return ret; + if (ret < 0) { + dev_err(dev, "failed to prepare_enable spi_clk (%d)\n", ret); + return ret; + } + + ret = clk_prepare_enable(mdata->spi_hclk); + if (ret < 0) { + dev_err(dev, "failed to prepare_enable spi_hclk (%d)\n", ret); + clk_disable_unprepare(mdata->spi_clk); + return ret; + } } return 0;