From patchwork Thu May 5 19:45:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 12840115 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id ED21FC433EF for ; Thu, 5 May 2022 19:48:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=vlxcWw1HWGnOUHR4CPl5MD8KoQDzpVIx5psNBc5PaS4=; b=j6/CeiYCsd2pqQ q/10v+7y/WgOlSyD9PjK6RnZdrFzbFHGJVJyEXYZGE14O6j/YQNr2H1nyJrPclYK0AU+mgTMOZPWJ LVsO68aNJaRLZaj17OmDcgVa8D9giEPEjD9Y3ij9/6NhPNFJiB6BcipxznF3d7ulAjlVpgaHqk1s+ bdohO8SN75p+m3MLXEptfatSoViLYqAtQPmijh0XsnEEmBe/W7rCxwE9jZMgpqaJWVoGj1yZDP2Bz Po5Rr6XaA4J0hfnhsfj3Z9kcagzXzNS0CbR7Y4tImu2EdWj65XX8YL2Zk0FejdPARakjA6nKRXmLO hM213o9b1DLNSjgRDp3g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nmhSQ-00HZ0i-3d; Thu, 05 May 2022 19:48:14 +0000 Received: from bhuna.collabora.co.uk ([46.235.227.227]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nmhQo-00HXlr-QE; Thu, 05 May 2022 19:46:36 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id 448A11F45CD4 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1651779993; bh=e74sZbpqUGhj6kx7s7bPANpIdoqwtDfemeI26ZuR+Yw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=iT1gT+XswaaRB3tvXjtX2P9YwdojMf8MvpLtpB6o39WkDOBggr7DqmJzXpXAckyGQ oDiBYI933R5vdaZddvqdrIBGSY/ArJnxm0p8R7tPuZd3yg9Pwsm5zUCzw4VWQdSLDC kEF9bppZUpFbd+HJZutnuiBEj9z+MBhI03uvQAJrGHXM+bWEq/FawTQZzYkFx8V2jx TZGKL//dB7u+ekP7npJFTZJoi19Tps2XE2frrhUbzUaoMS3OYGloZnigNvZSbiu6xb tD/7P/eqs5UsU37OcNKPF01TOoyONzX/xVC1epVd0gfL3Exwhg+fazLYMvDwnrffV3 AnfBwHshSJNqA== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Matthias Brugger Cc: AngeloGioacchino Del Regno , kernel@collabora.com, Chen-Yu Tsai , =?utf-8?b?TsOtY29s?= =?utf-8?b?YXMgRi4gUi4gQS4gUHJhZG8=?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 07/16] arm64: dts: mediatek: asurada: Add ChromeOS EC Date: Thu, 5 May 2022 15:45:41 -0400 Message-Id: <20220505194550.3094656-8-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220505194550.3094656-1-nfraprado@collabora.com> References: <20220505194550.3094656-1-nfraprado@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220505_124635_049678_5008D87D X-CRM114-Status: GOOD ( 10.69 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Add support for the ChromeOS Embedded Controller present on the Asurada platform. It is connected through the SPI1 bus and offers several functionalities: base detection, PWM controller, I2C tunneling, regulators, Type-C connector management, keyboard and Smart Battery Metrics (SBS). Signed-off-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno --- Changes in v2: - Renamed PWM subnode to avoid dt-binding warning (ec-pwm -> pwm) .../boot/dts/mediatek/mt8192-asurada.dtsi | 79 +++++++++++++++++++ 1 file changed, 79 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi index 3c5b1e475cf6..662207d0eb75 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -353,6 +353,14 @@ &pio { "AUD_DAT_MISO0", "AUD_DAT_MISO1"; + cros_ec_int: cros-ec-irq-default-pins { + pins-ec-ap-int-odl { + pinmux = ; + input-enable; + bias-pull-up; + }; + }; + i2c0_pins: i2c0-default-pins { pins-bus { pinmux = , @@ -432,6 +440,74 @@ &spi1 { mediatek,pad-select = <0>; pinctrl-names = "default"; pinctrl-0 = <&spi1_pins>; + + cros_ec: ec@0 { + compatible = "google,cros-ec-spi"; + reg = <0>; + interrupts-extended = <&pio 5 IRQ_TYPE_LEVEL_LOW>; + spi-max-frequency = <3000000>; + pinctrl-names = "default"; + pinctrl-0 = <&cros_ec_int>; + + #address-cells = <1>; + #size-cells = <0>; + + base_detection: cbas { + compatible = "google,cros-cbas"; + }; + + cros_ec_pwm: pwm { + compatible = "google,cros-ec-pwm"; + #pwm-cells = <1>; + + status = "disabled"; + }; + + i2c_tunnel: i2c-tunnel { + compatible = "google,cros-ec-i2c-tunnel"; + google,remote-bus = <0>; + #address-cells = <1>; + #size-cells = <0>; + }; + + mt6360_ldo3_reg: regulator@0 { + compatible = "google,cros-ec-regulator"; + reg = <0>; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; + + mt6360_ldo5_reg: regulator@1 { + compatible = "google,cros-ec-regulator"; + reg = <1>; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + typec { + compatible = "google,cros-ec-typec"; + #address-cells = <1>; + #size-cells = <0>; + + usb_c0: connector@0 { + compatible = "usb-c-connector"; + reg = <0>; + label = "left"; + power-role = "dual"; + data-role = "host"; + try-power-role = "source"; + }; + + usb_c1: connector@1 { + compatible = "usb-c-connector"; + reg = <1>; + label = "right"; + power-role = "dual"; + data-role = "host"; + try-power-role = "source"; + }; + }; + }; }; &spi5 { @@ -446,3 +522,6 @@ &spi5 { &uart0 { status = "okay"; }; + +#include +#include