Message ID | 20220523093346.28493-3-rex-bc.chen@mediatek.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Cleanup MediaTek clk reset drivers and support SoCs | expand |
Quoting Rex-BC Chen (2022-05-23 02:33:29) > Original assert/deassert bit is BIT(0), but it's more resonable to modify > them to BIT(id % 32) which is based on id. > > This patch will not influence any previous driver because the reset is > only used for thermal. The id (MT8183_INFRACFG_AO_THERM_SW_RST) is 0. > > Fixes: 64ebb57a3df6 ("clk: reset: Modify reset-controller driver") > Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> > Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> > Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> > Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> > --- Applied to clk-next
diff --git a/drivers/clk/mediatek/reset.c b/drivers/clk/mediatek/reset.c index 9f3cb22aea1b..5191becb45dd 100644 --- a/drivers/clk/mediatek/reset.c +++ b/drivers/clk/mediatek/reset.c @@ -18,7 +18,7 @@ static int mtk_reset_assert_set_clr(struct reset_controller_dev *rcdev, struct mtk_reset *data = container_of(rcdev, struct mtk_reset, rcdev); unsigned int reg = data->regofs + ((id / 32) << 4); - return regmap_write(data->regmap, reg, 1); + return regmap_write(data->regmap, reg, BIT(id % 32)); } static int mtk_reset_deassert_set_clr(struct reset_controller_dev *rcdev, @@ -27,7 +27,7 @@ static int mtk_reset_deassert_set_clr(struct reset_controller_dev *rcdev, struct mtk_reset *data = container_of(rcdev, struct mtk_reset, rcdev); unsigned int reg = data->regofs + ((id / 32) << 4) + 0x4; - return regmap_write(data->regmap, reg, 1); + return regmap_write(data->regmap, reg, BIT(id % 32)); } static int mtk_reset_assert(struct reset_controller_dev *rcdev,