From patchwork Tue Jun 14 06:52:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mingjia Zhang X-Patchwork-Id: 12880511 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D1C32C43334 for ; Tue, 14 Jun 2022 06:53:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=gY475nQZBdMIRMfDAbehcP+4a+Tosb7oyhIe/CLpP3g=; b=rkRdc3Fk01ZFa6 HGTjbhwrpp5cnlM/AFWhAc8qLTKTQkYZREkuoW3SdRjvZVAQmxoLC8t3d75asl2WyHcJAaK611tjK K6JO2cRDbm0w/3hyv/9gAh/zEJhIcPWwO0TmnLayxueq8gSXIRgI+dizt28/eS/IA0wMjnEpMoYtr EuwZW6uxd11569b8bb6chic7NDWcwHTgPW/DWldy7TGbAx/dUsd3qWDEsBhXEwkXhbMGNoNKAfafL sAWV3qqeR7cCPU+selrK+va5GKMhcDUG27PU35NtI0aJv+IOvrmOZTW3WNEU8EWw3rPbKrYCusDkd bUlCYPtI2Bt1YRfv16+Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o10Qh-007P6a-B2; Tue, 14 Jun 2022 06:53:35 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o10QO-007OoM-FC; Tue, 14 Jun 2022 06:53:18 +0000 X-UUID: 65d7fb4d309d4de39579c2d9cea7d8d7-20220613 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.6,REQID:2e7d3d00-7816-4ec9-bf13-efdb1b8be791,OB:0,LO B:0,IP:0,URL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,RULE:Release_Ham,ACTI ON:release,TS:0 X-CID-META: VersionHash:b14ad71,CLOUDID:c8178607-b57a-4a25-a071-bc7b4972bc68,C OID:IGNORED,Recheck:0,SF:nil,TC:nil,Content:0,EDM:-3,IP:nil,URL:0,File:nil ,QS:nil,BEC:nil,COL:0 X-UUID: 65d7fb4d309d4de39579c2d9cea7d8d7-20220613 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1420696961; Mon, 13 Jun 2022 23:53:07 -0700 Received: from mtkmbs10n1.mediatek.inc (172.21.101.34) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 13 Jun 2022 23:53:06 -0700 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Tue, 14 Jun 2022 14:53:04 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 14 Jun 2022 14:53:02 +0800 From: Mingjia Zhang To: Yunfei Dong , Alexandre Courbot , Nicolas Dufresne , "Hans Verkuil" , AngeloGioacchino Del Regno , Benjamin Gaignard , Tiffany Lin , Andrew-CT Chen , Mauro Carvalho Chehab , Rob Herring , Matthias Brugger , Tomasz Figa CC: George Sun , Xiaoyong Lu , Hsin-Yi Wang , Fritz Koenig , Daniel Vetter , dri-devel , Irui Wang , "Steve Cho" , , , , , , , Subject: [PATCH] media: mediatek: vcodec: Add to support VP9 inner racing mode Date: Tue, 14 Jun 2022 14:52:19 +0800 Message-ID: <20220614065219.29712-1-mingjia.zhang@mediatek.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220613_235316_545768_32FB40EA X-CRM114-Status: GOOD ( 15.88 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org From: mingjia zhang In order to reduce decoder latency, enable VP9 inner racing mode. Send lat trans buffer information to core when trigger lat to work, need not to wait until lat decode done. Signed-off-by: mingjia zhang --- .../vcodec/vdec/vdec_vp9_req_lat_if.c | 64 ++++++++++++------- 1 file changed, 40 insertions(+), 24 deletions(-) diff --git a/drivers/media/platform/mediatek/vcodec/vdec/vdec_vp9_req_lat_if.c b/drivers/media/platform/mediatek/vcodec/vdec/vdec_vp9_req_lat_if.c index fba06f321baa..35462d45fbf4 100644 --- a/drivers/media/platform/mediatek/vcodec/vdec/vdec_vp9_req_lat_if.c +++ b/drivers/media/platform/mediatek/vcodec/vdec/vdec_vp9_req_lat_if.c @@ -436,6 +436,7 @@ struct vdec_vp9_slice_ref { * @frame_ctx: 4 frame context according to VP9 Spec * @frame_ctx_helper: 4 frame context according to newest kernel spec * @dirty: state of each frame context + * @local_vsi: local instance vsi information * @init_vsi: vsi used for initialized VP9 instance * @vsi: vsi used for decoding/flush ... * @core_vsi: vsi used for Core stage @@ -482,6 +483,8 @@ struct vdec_vp9_slice_instance { struct v4l2_vp9_frame_context frame_ctx_helper; unsigned char dirty[4]; + struct vdec_vp9_slice_vsi local_vsi; + /* MicroP vsi */ union { struct vdec_vp9_slice_init_vsi *init_vsi; @@ -1617,16 +1620,10 @@ static int vdec_vp9_slice_update_single(struct vdec_vp9_slice_instance *instance } static int vdec_vp9_slice_update_lat(struct vdec_vp9_slice_instance *instance, - struct vdec_lat_buf *lat_buf, - struct vdec_vp9_slice_pfc *pfc) + struct vdec_vp9_slice_vsi *vsi) { - struct vdec_vp9_slice_vsi *vsi; - - vsi = &pfc->vsi; - memcpy(&pfc->state[0], &vsi->state, sizeof(vsi->state)); - mtk_vcodec_debug(instance, "Frame %u LAT CRC 0x%08x %lx %lx\n", - pfc->seq, vsi->state.crc[0], + (instance->seq - 1), vsi->state.crc[0], (unsigned long)vsi->trans.dma_addr, (unsigned long)vsi->trans.dma_addr_end); @@ -2091,6 +2088,13 @@ static int vdec_vp9_slice_lat_decode(void *h_vdec, struct mtk_vcodec_mem *bs, return ret; } + if (IS_VDEC_INNER_RACING(instance->ctx->dev->dec_capability)) { + vdec_vp9_slice_vsi_from_remote(vsi, instance->vsi, 0); + memcpy(&instance->local_vsi, vsi, sizeof(*vsi)); + vdec_msg_queue_qbuf(&ctx->dev->msg_queue_core_ctx, lat_buf); + vsi = &instance->local_vsi; + } + if (instance->irq) { ret = mtk_vcodec_wait_for_done_ctx(ctx, MTK_INST_IRQ_RECEIVED, WAIT_INTR_TIMEOUT_MS, MTK_VDEC_LAT0); @@ -2103,22 +2107,25 @@ static int vdec_vp9_slice_lat_decode(void *h_vdec, struct mtk_vcodec_mem *bs, } vdec_vp9_slice_vsi_from_remote(vsi, instance->vsi, 0); - ret = vdec_vp9_slice_update_lat(instance, lat_buf, pfc); + ret = vdec_vp9_slice_update_lat(instance, vsi); - /* LAT trans full, no more UBE or decode timeout */ - if (ret) { - mtk_vcodec_err(instance, "VP9 decode error: %d\n", ret); - return ret; - } + if (!IS_VDEC_INNER_RACING(instance->ctx->dev->dec_capability)) + /* LAT trans full, no more UBE or decode timeout */ + if (ret) { + mtk_vcodec_err(instance, "frame[%d] decode error: %d\n", + ret, (instance->seq - 1)); + return ret; + } - mtk_vcodec_debug(instance, "lat dma addr: 0x%lx 0x%lx\n", - (unsigned long)pfc->vsi.trans.dma_addr, - (unsigned long)pfc->vsi.trans.dma_addr_end); - vdec_msg_queue_update_ube_wptr(&ctx->msg_queue, - vsi->trans.dma_addr_end + - ctx->msg_queue.wdma_addr.dma_addr); - vdec_msg_queue_qbuf(&ctx->dev->msg_queue_core_ctx, lat_buf); + vsi->trans.dma_addr_end += ctx->msg_queue.wdma_addr.dma_addr; + vdec_msg_queue_update_ube_wptr(&ctx->msg_queue, vsi->trans.dma_addr_end); + if (!IS_VDEC_INNER_RACING(instance->ctx->dev->dec_capability)) + vdec_msg_queue_qbuf(&ctx->dev->msg_queue_core_ctx, lat_buf); + + mtk_vcodec_debug(instance, "lat trans end addr(0x%lx), ube start addr(0x%lx)\n", + (unsigned long)vsi->trans.dma_addr_end, + (unsigned long)ctx->msg_queue.wdma_addr.dma_addr); return 0; } @@ -2194,10 +2201,14 @@ static int vdec_vp9_slice_core_decode(struct vdec_lat_buf *lat_buf) goto err; } - pfc->vsi.trans.dma_addr_end += ctx->msg_queue.wdma_addr.dma_addr; mtk_vcodec_debug(instance, "core dma_addr_end 0x%lx\n", (unsigned long)pfc->vsi.trans.dma_addr_end); - vdec_msg_queue_update_ube_rptr(&ctx->msg_queue, pfc->vsi.trans.dma_addr_end); + + if (IS_VDEC_INNER_RACING(instance->ctx->dev->dec_capability)) + vdec_msg_queue_update_ube_rptr(&ctx->msg_queue, pfc->vsi.trans.dma_addr); + else + vdec_msg_queue_update_ube_rptr(&ctx->msg_queue, pfc->vsi.trans.dma_addr_end); + ctx->dev->vdec_pdata->cap_to_disp(ctx, 0, lat_buf->src_buf_req); return 0; @@ -2205,7 +2216,12 @@ static int vdec_vp9_slice_core_decode(struct vdec_lat_buf *lat_buf) err: if (ctx && pfc) { /* always update read pointer */ - vdec_msg_queue_update_ube_rptr(&ctx->msg_queue, pfc->vsi.trans.dma_addr_end); + if (IS_VDEC_INNER_RACING(instance->ctx->dev->dec_capability)) + vdec_msg_queue_update_ube_rptr(&ctx->msg_queue, + pfc->vsi.trans.dma_addr); + else + vdec_msg_queue_update_ube_rptr(&ctx->msg_queue, + pfc->vsi.trans.dma_addr_end); if (fb) ctx->dev->vdec_pdata->cap_to_disp(ctx, 1, lat_buf->src_buf_req);