Message ID | 20220620121028.29234-15-rex-bc.chen@mediatek.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | drm/mediatek: Add MT8195 dp_intf driver | expand |
Hi, Bo-Chen: On Mon, 2022-06-20 at 20:10 +0800, Bo-Chen Chen wrote: > From: Guillaume Ranquet <granquet@baylibre.com> > > Matrix selection is a new feature for both dpi and dpintf of MT8195. > Add a mtk_dpi_matrix_sel() helper to update the DPI_MATRIX_SET > register depending on the color format. Describe more about what this do. > > Signed-off-by: Guillaume Ranquet <granquet@baylibre.com> > Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> > --- > drivers/gpu/drm/mediatek/mtk_dpi.c | 29 > +++++++++++++++++++++++++ > drivers/gpu/drm/mediatek/mtk_dpi_regs.h | 3 +++ > 2 files changed, 32 insertions(+) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c > b/drivers/gpu/drm/mediatek/mtk_dpi.c > index 220e9b18e2cd..8a9151cb1622 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > @@ -135,6 +135,7 @@ struct mtk_dpi_conf { > u32 channel_swap_shift; > u32 yuv422_en_bit; > u32 csc_enable_bit; > + bool matrx_sel_support; > }; > > static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val, > u32 mask) > @@ -398,6 +399,31 @@ static void mtk_dpi_config_disable_edge(struct > mtk_dpi *dpi) > mtk_dpi_mask(dpi, dpi->conf->reg_h_fre_con, 0, > EDGE_SEL_EN); > } > > +static void mtk_dpi_matrix_sel(struct mtk_dpi *dpi, > + enum mtk_dpi_out_color_format format) > +{ > + u32 matrix_sel = 0; > + > + if (!dpi->conf->matrx_sel_support) { > + dev_info(dpi->dev, "matrix_sel is not supported.\n"); So for this SoC, there would be something wrong? I still does not understand what this feature is. static const struct of_device_id mtk_dpi_of_ids[] = { { .compatible = "mediatek,mt2701-dpi", .data = &mt2701_conf, }, { .compatible = "mediatek,mt8173-dpi", .data = &mt8173_conf, }, { .compatible = "mediatek,mt8183-dpi", .data = &mt8183_conf, }, { .compatible = "mediatek,mt8192-dpi", .data = &mt8192_conf, }, { }, }; > + return; > + } > + > + switch (format) { > + case MTK_DPI_COLOR_FORMAT_YCBCR_422: > + case MTK_DPI_COLOR_FORMAT_YCBCR_422_FULL: > + case MTK_DPI_COLOR_FORMAT_YCBCR_444: > + case MTK_DPI_COLOR_FORMAT_YCBCR_444_FULL: > + case MTK_DPI_COLOR_FORMAT_XV_YCC: > + if (dpi->mode.hdisplay <= 720) > + matrix_sel = 0x2; Symbolize 0x2. > + break; > + default: If format is MTK_DPI_COLOR_FORMAT_YCBCR_422 first, then format change to MTK_DPI_COLOR_FORMAT_RGB and matrix_sel would still be 0x2. Is this correct? Regards, CK > + break; > + } > + mtk_dpi_mask(dpi, DPI_MATRIX_SET, matrix_sel, > INT_MATRIX_SEL_MASK); > +} > + > static void mtk_dpi_config_color_format(struct mtk_dpi *dpi, > enum mtk_dpi_out_color_format > format) > { > @@ -405,6 +431,7 @@ static void mtk_dpi_config_color_format(struct > mtk_dpi *dpi, > (format == MTK_DPI_COLOR_FORMAT_YCBCR_444_FULL)) { > mtk_dpi_config_yuv422_enable(dpi, false); > mtk_dpi_config_csc_enable(dpi, true); > + mtk_dpi_matrix_sel(dpi, format); > if (dpi->conf->swap_input_support) > mtk_dpi_config_swap_input(dpi, false); > mtk_dpi_config_channel_swap(dpi, > MTK_DPI_OUT_CHANNEL_SWAP_BGR); > @@ -412,6 +439,7 @@ static void mtk_dpi_config_color_format(struct > mtk_dpi *dpi, > (format == MTK_DPI_COLOR_FORMAT_YCBCR_422_FULL)) { > mtk_dpi_config_yuv422_enable(dpi, true); > mtk_dpi_config_csc_enable(dpi, true); > + mtk_dpi_matrix_sel(dpi, format); > if (dpi->conf->swap_input_support) > mtk_dpi_config_swap_input(dpi, true); > else > @@ -951,6 +979,7 @@ static const struct mtk_dpi_conf > mt8195_dpintf_conf = { > .channel_swap_shift = DPINTF_CH_SWAP, > .yuv422_en_bit = DPINTF_YUV422_EN, > .csc_enable_bit = DPINTF_CSC_ENABLE, > + .matrx_sel_support = true, > }; > > static int mtk_dpi_probe(struct platform_device *pdev) > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi_regs.h > b/drivers/gpu/drm/mediatek/mtk_dpi_regs.h > index f7f0272dbd6a..96c117202d0d 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dpi_regs.h > +++ b/drivers/gpu/drm/mediatek/mtk_dpi_regs.h > @@ -230,4 +230,7 @@ > #define EDGE_SEL_EN BIT(5) > #define H_FRE_2N BIT(25) > > +#define DPI_MATRIX_SET 0xB4 > +#define INT_MATRIX_SEL_MASK (0x1F << 0) > + > #endif /* __MTK_DPI_REGS_H */
On Tue, 2022-06-21 at 11:33 +0800, CK Hu wrote: > Hi, Bo-Chen: > > On Mon, 2022-06-20 at 20:10 +0800, Bo-Chen Chen wrote: > > From: Guillaume Ranquet <granquet@baylibre.com> > > > > Matrix selection is a new feature for both dpi and dpintf of > > MT8195. > > Add a mtk_dpi_matrix_sel() helper to update the DPI_MATRIX_SET > > register depending on the color format. > > Describe more about what this do. > this feature is color format transfer. For mt8195, the input format is RGB888 andd output format could be YUV422. do you think I should squash this patch into [v12,12/14] drm/mediatek: dpi: Add YUV422 output support? > > > > Signed-off-by: Guillaume Ranquet <granquet@baylibre.com> > > Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> > > --- > > drivers/gpu/drm/mediatek/mtk_dpi.c | 29 > > +++++++++++++++++++++++++ > > drivers/gpu/drm/mediatek/mtk_dpi_regs.h | 3 +++ > > 2 files changed, 32 insertions(+) > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c > > b/drivers/gpu/drm/mediatek/mtk_dpi.c > > index 220e9b18e2cd..8a9151cb1622 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > > @@ -135,6 +135,7 @@ struct mtk_dpi_conf { > > u32 channel_swap_shift; > > u32 yuv422_en_bit; > > u32 csc_enable_bit; > > + bool matrx_sel_support; > > }; > > > > static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val, > > u32 mask) > > @@ -398,6 +399,31 @@ static void mtk_dpi_config_disable_edge(struct > > mtk_dpi *dpi) > > mtk_dpi_mask(dpi, dpi->conf->reg_h_fre_con, 0, > > EDGE_SEL_EN); > > } > > > > +static void mtk_dpi_matrix_sel(struct mtk_dpi *dpi, > > + enum mtk_dpi_out_color_format format) > > +{ > > + u32 matrix_sel = 0; > > + > > + if (!dpi->conf->matrx_sel_support) { > > + dev_info(dpi->dev, "matrix_sel is not supported.\n"); > > So for this SoC, there would be something wrong? I still does not > understand what this feature is. > > static const struct of_device_id mtk_dpi_of_ids[] = { > { .compatible = "mediatek,mt2701-dpi", > .data = &mt2701_conf, > }, > { .compatible = "mediatek,mt8173-dpi", > .data = &mt8173_conf, > }, > { .compatible = "mediatek,mt8183-dpi", > .data = &mt8183_conf, > }, > { .compatible = "mediatek,mt8192-dpi", > .data = &mt8192_conf, > }, > { }, > }; > > > + return; > > + } > > + > > + switch (format) { > > + case MTK_DPI_COLOR_FORMAT_YCBCR_422: > > + case MTK_DPI_COLOR_FORMAT_YCBCR_422_FULL: > > + case MTK_DPI_COLOR_FORMAT_YCBCR_444: > > + case MTK_DPI_COLOR_FORMAT_YCBCR_444_FULL: > > + case MTK_DPI_COLOR_FORMAT_XV_YCC: > > + if (dpi->mode.hdisplay <= 720) > > + matrix_sel = 0x2; > > Symbolize 0x2. > > > + break; > > + default: > > If format is MTK_DPI_COLOR_FORMAT_YCBCR_422 first, then format change > to MTK_DPI_COLOR_FORMAT_RGB and matrix_sel would still be 0x2. Is > this > correct? > > Regards, > CK > > > + break; > > + } > > + mtk_dpi_mask(dpi, DPI_MATRIX_SET, matrix_sel, > > INT_MATRIX_SEL_MASK); > > +} > > + > > static void mtk_dpi_config_color_format(struct mtk_dpi *dpi, > > enum mtk_dpi_out_color_format > > format) > > { > > @@ -405,6 +431,7 @@ static void mtk_dpi_config_color_format(struct > > mtk_dpi *dpi, > > (format == MTK_DPI_COLOR_FORMAT_YCBCR_444_FULL)) { > > mtk_dpi_config_yuv422_enable(dpi, false); > > mtk_dpi_config_csc_enable(dpi, true); > > + mtk_dpi_matrix_sel(dpi, format); > > if (dpi->conf->swap_input_support) > > mtk_dpi_config_swap_input(dpi, false); > > mtk_dpi_config_channel_swap(dpi, > > MTK_DPI_OUT_CHANNEL_SWAP_BGR); > > @@ -412,6 +439,7 @@ static void mtk_dpi_config_color_format(struct > > mtk_dpi *dpi, > > (format == MTK_DPI_COLOR_FORMAT_YCBCR_422_FULL)) { > > mtk_dpi_config_yuv422_enable(dpi, true); > > mtk_dpi_config_csc_enable(dpi, true); > > + mtk_dpi_matrix_sel(dpi, format); > > if (dpi->conf->swap_input_support) > > mtk_dpi_config_swap_input(dpi, true); > > else > > @@ -951,6 +979,7 @@ static const struct mtk_dpi_conf > > mt8195_dpintf_conf = { > > .channel_swap_shift = DPINTF_CH_SWAP, > > .yuv422_en_bit = DPINTF_YUV422_EN, > > .csc_enable_bit = DPINTF_CSC_ENABLE, > > + .matrx_sel_support = true, > > }; > > > > static int mtk_dpi_probe(struct platform_device *pdev) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi_regs.h > > b/drivers/gpu/drm/mediatek/mtk_dpi_regs.h > > index f7f0272dbd6a..96c117202d0d 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_dpi_regs.h > > +++ b/drivers/gpu/drm/mediatek/mtk_dpi_regs.h > > @@ -230,4 +230,7 @@ > > #define EDGE_SEL_EN BIT(5) > > #define H_FRE_2N BIT(25) > > > > +#define DPI_MATRIX_SET 0xB4 > > +#define INT_MATRIX_SEL_MASK (0x1F << 0) > > + > > #endif /* __MTK_DPI_REGS_H */ > >
Hi, Rex: On Tue, 2022-06-21 at 16:41 +0800, Rex-BC Chen wrote: > On Tue, 2022-06-21 at 11:33 +0800, CK Hu wrote: > > Hi, Bo-Chen: > > > > On Mon, 2022-06-20 at 20:10 +0800, Bo-Chen Chen wrote: > > > From: Guillaume Ranquet <granquet@baylibre.com> > > > > > > Matrix selection is a new feature for both dpi and dpintf of > > > MT8195. > > > Add a mtk_dpi_matrix_sel() helper to update the DPI_MATRIX_SET > > > register depending on the color format. > > > > Describe more about what this do. > > > > this feature is color format transfer. > For mt8195, the input format is RGB888 andd output format could be > YUV422. do you think I should squash this patch into [v12,12/14] > drm/mediatek: dpi: Add YUV422 output support? OK, squash these two patches and add this description into commit message. For RGB input and RGB output, I think this function should be disabled. Regards, CK > > > > > > > Signed-off-by: Guillaume Ranquet <granquet@baylibre.com> > > > Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> > > > --- > > > drivers/gpu/drm/mediatek/mtk_dpi.c | 29 > > > +++++++++++++++++++++++++ > > > drivers/gpu/drm/mediatek/mtk_dpi_regs.h | 3 +++ > > > 2 files changed, 32 insertions(+) > > > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c > > > b/drivers/gpu/drm/mediatek/mtk_dpi.c > > > index 220e9b18e2cd..8a9151cb1622 100644 > > > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > > > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > > > @@ -135,6 +135,7 @@ struct mtk_dpi_conf { > > > u32 channel_swap_shift; > > > u32 yuv422_en_bit; > > > u32 csc_enable_bit; > > > + bool matrx_sel_support; > > > }; > > > > > > static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 > > > val, > > > u32 mask) > > > @@ -398,6 +399,31 @@ static void > > > mtk_dpi_config_disable_edge(struct > > > mtk_dpi *dpi) > > > mtk_dpi_mask(dpi, dpi->conf->reg_h_fre_con, 0, > > > EDGE_SEL_EN); > > > } > > > > > > +static void mtk_dpi_matrix_sel(struct mtk_dpi *dpi, > > > + enum mtk_dpi_out_color_format format) > > > +{ > > > + u32 matrix_sel = 0; > > > + > > > + if (!dpi->conf->matrx_sel_support) { > > > + dev_info(dpi->dev, "matrix_sel is not supported.\n"); > > > > So for this SoC, there would be something wrong? I still does not > > understand what this feature is. > > > > static const struct of_device_id mtk_dpi_of_ids[] = { > > { .compatible = "mediatek,mt2701-dpi", > > .data = &mt2701_conf, > > }, > > { .compatible = "mediatek,mt8173-dpi", > > .data = &mt8173_conf, > > }, > > { .compatible = "mediatek,mt8183-dpi", > > .data = &mt8183_conf, > > }, > > { .compatible = "mediatek,mt8192-dpi", > > .data = &mt8192_conf, > > }, > > { }, > > }; > > > > > + return; > > > + } > > > + > > > + switch (format) { > > > + case MTK_DPI_COLOR_FORMAT_YCBCR_422: > > > + case MTK_DPI_COLOR_FORMAT_YCBCR_422_FULL: > > > + case MTK_DPI_COLOR_FORMAT_YCBCR_444: > > > + case MTK_DPI_COLOR_FORMAT_YCBCR_444_FULL: > > > + case MTK_DPI_COLOR_FORMAT_XV_YCC: > > > + if (dpi->mode.hdisplay <= 720) > > > + matrix_sel = 0x2; > > > > Symbolize 0x2. > > > > > + break; > > > + default: > > > > If format is MTK_DPI_COLOR_FORMAT_YCBCR_422 first, then format > > change > > to MTK_DPI_COLOR_FORMAT_RGB and matrix_sel would still be 0x2. Is > > this > > correct? > > > > Regards, > > CK > > > > > + break; > > > + } > > > + mtk_dpi_mask(dpi, DPI_MATRIX_SET, matrix_sel, > > > INT_MATRIX_SEL_MASK); > > > +} > > > + > > > static void mtk_dpi_config_color_format(struct mtk_dpi *dpi, > > > enum mtk_dpi_out_color_format > > > format) > > > { > > > @@ -405,6 +431,7 @@ static void > > > mtk_dpi_config_color_format(struct > > > mtk_dpi *dpi, > > > (format == MTK_DPI_COLOR_FORMAT_YCBCR_444_FULL)) { > > > mtk_dpi_config_yuv422_enable(dpi, false); > > > mtk_dpi_config_csc_enable(dpi, true); > > > + mtk_dpi_matrix_sel(dpi, format); > > > if (dpi->conf->swap_input_support) > > > mtk_dpi_config_swap_input(dpi, false); > > > mtk_dpi_config_channel_swap(dpi, > > > MTK_DPI_OUT_CHANNEL_SWAP_BGR); > > > @@ -412,6 +439,7 @@ static void > > > mtk_dpi_config_color_format(struct > > > mtk_dpi *dpi, > > > (format == MTK_DPI_COLOR_FORMAT_YCBCR_422_FULL)) { > > > mtk_dpi_config_yuv422_enable(dpi, true); > > > mtk_dpi_config_csc_enable(dpi, true); > > > + mtk_dpi_matrix_sel(dpi, format); > > > if (dpi->conf->swap_input_support) > > > mtk_dpi_config_swap_input(dpi, true); > > > else > > > @@ -951,6 +979,7 @@ static const struct mtk_dpi_conf > > > mt8195_dpintf_conf = { > > > .channel_swap_shift = DPINTF_CH_SWAP, > > > .yuv422_en_bit = DPINTF_YUV422_EN, > > > .csc_enable_bit = DPINTF_CSC_ENABLE, > > > + .matrx_sel_support = true, > > > }; > > > > > > static int mtk_dpi_probe(struct platform_device *pdev) > > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi_regs.h > > > b/drivers/gpu/drm/mediatek/mtk_dpi_regs.h > > > index f7f0272dbd6a..96c117202d0d 100644 > > > --- a/drivers/gpu/drm/mediatek/mtk_dpi_regs.h > > > +++ b/drivers/gpu/drm/mediatek/mtk_dpi_regs.h > > > @@ -230,4 +230,7 @@ > > > #define EDGE_SEL_EN BIT(5) > > > #define H_FRE_2N BIT(25) > > > > > > +#define DPI_MATRIX_SET 0xB4 > > > +#define INT_MATRIX_SEL_MASK (0x1F << 0) > > > + > > > #endif /* __MTK_DPI_REGS_H */ > > > > > >
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c index 220e9b18e2cd..8a9151cb1622 100644 --- a/drivers/gpu/drm/mediatek/mtk_dpi.c +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c @@ -135,6 +135,7 @@ struct mtk_dpi_conf { u32 channel_swap_shift; u32 yuv422_en_bit; u32 csc_enable_bit; + bool matrx_sel_support; }; static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val, u32 mask) @@ -398,6 +399,31 @@ static void mtk_dpi_config_disable_edge(struct mtk_dpi *dpi) mtk_dpi_mask(dpi, dpi->conf->reg_h_fre_con, 0, EDGE_SEL_EN); } +static void mtk_dpi_matrix_sel(struct mtk_dpi *dpi, + enum mtk_dpi_out_color_format format) +{ + u32 matrix_sel = 0; + + if (!dpi->conf->matrx_sel_support) { + dev_info(dpi->dev, "matrix_sel is not supported.\n"); + return; + } + + switch (format) { + case MTK_DPI_COLOR_FORMAT_YCBCR_422: + case MTK_DPI_COLOR_FORMAT_YCBCR_422_FULL: + case MTK_DPI_COLOR_FORMAT_YCBCR_444: + case MTK_DPI_COLOR_FORMAT_YCBCR_444_FULL: + case MTK_DPI_COLOR_FORMAT_XV_YCC: + if (dpi->mode.hdisplay <= 720) + matrix_sel = 0x2; + break; + default: + break; + } + mtk_dpi_mask(dpi, DPI_MATRIX_SET, matrix_sel, INT_MATRIX_SEL_MASK); +} + static void mtk_dpi_config_color_format(struct mtk_dpi *dpi, enum mtk_dpi_out_color_format format) { @@ -405,6 +431,7 @@ static void mtk_dpi_config_color_format(struct mtk_dpi *dpi, (format == MTK_DPI_COLOR_FORMAT_YCBCR_444_FULL)) { mtk_dpi_config_yuv422_enable(dpi, false); mtk_dpi_config_csc_enable(dpi, true); + mtk_dpi_matrix_sel(dpi, format); if (dpi->conf->swap_input_support) mtk_dpi_config_swap_input(dpi, false); mtk_dpi_config_channel_swap(dpi, MTK_DPI_OUT_CHANNEL_SWAP_BGR); @@ -412,6 +439,7 @@ static void mtk_dpi_config_color_format(struct mtk_dpi *dpi, (format == MTK_DPI_COLOR_FORMAT_YCBCR_422_FULL)) { mtk_dpi_config_yuv422_enable(dpi, true); mtk_dpi_config_csc_enable(dpi, true); + mtk_dpi_matrix_sel(dpi, format); if (dpi->conf->swap_input_support) mtk_dpi_config_swap_input(dpi, true); else @@ -951,6 +979,7 @@ static const struct mtk_dpi_conf mt8195_dpintf_conf = { .channel_swap_shift = DPINTF_CH_SWAP, .yuv422_en_bit = DPINTF_YUV422_EN, .csc_enable_bit = DPINTF_CSC_ENABLE, + .matrx_sel_support = true, }; static int mtk_dpi_probe(struct platform_device *pdev) diff --git a/drivers/gpu/drm/mediatek/mtk_dpi_regs.h b/drivers/gpu/drm/mediatek/mtk_dpi_regs.h index f7f0272dbd6a..96c117202d0d 100644 --- a/drivers/gpu/drm/mediatek/mtk_dpi_regs.h +++ b/drivers/gpu/drm/mediatek/mtk_dpi_regs.h @@ -230,4 +230,7 @@ #define EDGE_SEL_EN BIT(5) #define H_FRE_2N BIT(25) +#define DPI_MATRIX_SET 0xB4 +#define INT_MATRIX_SEL_MASK (0x1F << 0) + #endif /* __MTK_DPI_REGS_H */