| Message ID | 20220623123850.110225-3-angelogioacchino.delregno@collabora.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Allow getting regulator on MFG for multiple SoCs | expand |
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi index 89e4358f140a..33f3bf277ce9 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi @@ -821,6 +821,10 @@ cros_ec { }; }; +&mfg_async { + domain-supply = <&mt6358_vsram_gpu_reg>; +}; + &mfg { domain-supply = <&mt6358_vgpu_reg>; }; diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 9485c1efc87c..9d32871973a2 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -788,7 +788,7 @@ power-domain@MT8183_POWER_DOMAIN_CONN { #power-domain-cells = <0>; }; - power-domain@MT8183_POWER_DOMAIN_MFG_ASYNC { + mfg_async: power-domain@MT8183_POWER_DOMAIN_MFG_ASYNC { reg = <MT8183_POWER_DOMAIN_MFG_ASYNC>; clocks = <&topckgen CLK_TOP_MUX_MFG>; clock-names = "mfg";
Add a phandle to the MT8183_POWER_DOMAIN_MFG_ASYNC power domain and assign the GPU VSRAM supply to this in mt8183-kukui: this allows to keep the sram powered up while the GPU is used. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi | 4 ++++ arch/arm64/boot/dts/mediatek/mt8183.dtsi | 2 +- 2 files changed, 5 insertions(+), 1 deletion(-)