From patchwork Mon Jun 27 08:03:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?UmV4LUJDIENoZW4gKOmZs+afj+i+sCk=?= X-Patchwork-Id: 12896357 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D2B60C433EF for ; Mon, 27 Jun 2022 08:06:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type:MIME-Version: References:In-Reply-To:Message-ID:Date:Subject:CC:To:From:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=pgGSh6y4WKEnfNPhcMaNT57rOikZglwQF4Ki8fAQn7k=; b=UHzDkE/WvNX8tOahc24gS9Ymzv URHneH4df65L4rZunVEpGLY5w9FXk0XbTaMnMSdt5GK0M5p3RazRHba7eCggh9o7VYVjIAWAhRYrI 9J1z/N8A/Ps5poX0WLGxK7XcDT9VLZiAZTTG9G8VQtFJtKu6jOKTrtrsVgkXLdBZqZUQBWKfM/0Xh tdfZ/5QIxFK0ZicCxnvo10AhYC3GJ9VXn+/1jkNJ3F1K08dqn45e9Vd/M8EeGMoIf8UPORBt8+ju9 ilV7/Pa0KwlD3QBGNc26ePXbPofBr3mhbVoPO+fZfO/DODFVlH8vHKuTt4xAPeHHn+u90Lgw6MH74 3DG5Adog==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o5jlF-00GdeO-Nv; Mon, 27 Jun 2022 08:06:21 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o5jl0-00GdUI-1Z; Mon, 27 Jun 2022 08:06:07 +0000 X-UUID: d810abcc0b5a4842bded1ffee06a9a24-20220627 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.6,REQID:59b611d7-2780-4505-89a4-c1aac5f28d50,OB:0,LO B:0,IP:0,URL:25,TC:0,Content:-5,EDM:0,RT:0,SF:0,FILE:0,RULE:Release_Ham,AC TION:release,TS:20 X-CID-META: VersionHash:b14ad71,CLOUDID:d39ca7d8-850a-491d-a127-60d9309b2b3e,C OID:IGNORED,Recheck:0,SF:nil,TC:nil,Content:0,EDM:-3,IP:nil,URL:1,File:nil ,QS:nil,BEC:nil,COL:0 X-UUID: d810abcc0b5a4842bded1ffee06a9a24-20220627 Received: from mtkcas67.mediatek.inc [(172.29.193.45)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1832812926; Mon, 27 Jun 2022 01:06:01 -0700 Received: from mtkmbs07n1.mediatek.inc (172.21.101.16) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 27 Jun 2022 01:03:44 -0700 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 27 Jun 2022 16:03:43 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.3 via Frontend Transport; Mon, 27 Jun 2022 16:03:43 +0800 From: Bo-Chen Chen To: , , , , , , , , , CC: , , , , , , , , , , , , , Bo-Chen Chen Subject: [PATCH v12 01/10] dt-bindings: mediatek,dp: Add Display Port binding Date: Mon, 27 Jun 2022 16:03:32 +0800 Message-ID: <20220627080341.5087-2-rex-bc.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220627080341.5087-1-rex-bc.chen@mediatek.com> References: <20220627080341.5087-1-rex-bc.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220627_010606_097621_A79591C1 X-CRM114-Status: GOOD ( 13.80 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org From: Markus Schneider-Pargmann This controller is present on several mediatek hardware. Currently mt8195 and mt8395 have this controller without a functional difference, so only one compatible field is added. The controller can have two forms, as a normal display port and as an embedded display port. Signed-off-by: Markus Schneider-Pargmann Signed-off-by: Guillaume Ranquet [Bo-Chen: Fix reviewers' comment] Signed-off-by: Bo-Chen Chen --- .../display/mediatek/mediatek,dp.yaml | 108 ++++++++++++++++++ 1 file changed, 108 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml new file mode 100644 index 000000000000..1a16545b6afa --- /dev/null +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml @@ -0,0 +1,108 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/mediatek/mediatek,dp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek Display Port Controller + +maintainers: + - Chun-Kuang Hu + - Jitao shi + +description: | + Device tree bindings for the MediaTek display port and + embedded display port controller present on some MediaTek SoCs. + +properties: + compatible: + enum: + - mediatek,mt8195-dp-tx + - mediatek,mt8195-edp-tx + + reg: + maxItems: 1 + + nvmem-cells: + maxItems: 1 + description: efuse data for display port calibration + + nvmem-cell-names: + const: dp_calibration_data + + power-domains: + maxItems: 1 + + interrupts: + maxItems: 1 + + ports: + $ref: /schemas/graph.yaml#/properties/ports + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: Input endpoint of the controller, usually dp_intf + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: Output endpoint of the controller + + required: + - port@0 + - port@1 + + data-lanes: + $ref: /schemas/media/video-interfaces.yaml# + description: | + number of lanes supported by the hardware. + The possible values: + 0 - For 1 lane enabled in IP. + 0 1 - For 2 lanes enabled in IP. + 0 1 2 3 - For 4 lanes enabled in IP. + minItems: 1 + maxItems: 4 + + max-linkrate-mhz: + enum: [ 1620, 2700, 5400, 8100 ] + description: maximum link rate supported by the hardware. + +required: + - compatible + - reg + - interrupts + - ports + - data-lanes + - max-linkrate-mhz + +additionalProperties: false + +examples: + - | + #include + #include + dp_tx@1c600000 { + compatible = "mediatek,mt8195-dp-tx"; + reg = <0x1c600000 0x8000>; + power-domains = <&spm MT8195_POWER_DOMAIN_DP_TX>; + interrupts = ; + data-lanes = <0 1 2 3>; + max-linkrate-mhz = <8100>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + edp_in: endpoint { + remote-endpoint = <&dp_intf0_out>; + }; + }; + port@1 { + reg = <1>; + edp_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; + }; + };