From patchwork Fri Jul 1 03:58:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?UmV4LUJDIENoZW4gKOmZs+afj+i+sCk=?= X-Patchwork-Id: 12902659 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 84C9FC433EF for ; Fri, 1 Jul 2022 04:02:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type:MIME-Version: References:In-Reply-To:Message-ID:Date:Subject:CC:To:From:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=iLGDCYbsLitDvxVpSoytchS43/bgdW47CM75vu37eVo=; b=LR+J58lphZEPAHDEZkGoRNSIwy Wq3UukyZ2KmsUtZzBdQ5O4D67HwV79ZPNMfaW2kXr+BdzARgVyjsFFK09smRt61O90pWL0la6v1jl V4EWE6ZXjUNsODmKhFUQ0ejTqsUDWqi0qquzU9/bbnXbyrAYthSu8wpIQIFym9VOIxSmhSRyilh8A Hx+Ctggsu61trzHmi2yywr8LoP1BXfRzzT5xFY4ARKquuew3QNfHSfB4AnIMlYl2ciPEPgLPiTKGD EglflQlLSju8pv1WGLeGxI/S4QmWU8A/316ahkicwG/OaJTHKEUrQkzm4Od+9reqhqMIx33wDLpH3 JfSQ/TRA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o77r9-002jTc-Kl; Fri, 01 Jul 2022 04:02:11 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o77qU-002j5L-IW; Fri, 01 Jul 2022 04:01:32 +0000 X-UUID: 11c72fa7ab014bcdb3b71c9df3c79f54-20220630 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.7,REQID:670dc509-16ce-4d9a-8bd3-3879d8243d16,OB:0,LO B:0,IP:0,URL:5,TC:0,Content:0,EDM:25,RT:0,SF:0,FILE:0,RULE:Release_Ham,ACT ION:release,TS:30 X-CID-META: VersionHash:87442a2,CLOUDID:003651d6-5d6d-4eaf-a635-828a3ee48b7c,C OID:IGNORED,Recheck:0,SF:nil,TC:nil,Content:0,EDM:5,IP:nil,URL:1,File:nil, QS:nil,BEC:nil,COL:0 X-UUID: 11c72fa7ab014bcdb3b71c9df3c79f54-20220630 Received: from mtkmbs11n1.mediatek.inc [(172.21.101.185)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 2103484884; Thu, 30 Jun 2022 21:01:23 -0700 Received: from mtkmbs11n1.mediatek.inc (172.21.101.186) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Fri, 1 Jul 2022 11:58:47 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.3 via Frontend Transport; Fri, 1 Jul 2022 11:58:47 +0800 From: Bo-Chen Chen To: , , , , , , CC: , , , , , , , , , , , , , , Bo-Chen Chen Subject: [PATCH v15 05/16] drm/mediatek: dpi: Add support for quantization range Date: Fri, 1 Jul 2022 11:58:34 +0800 Message-ID: <20220701035845.16458-6-rex-bc.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220701035845.16458-1-rex-bc.chen@mediatek.com> References: <20220701035845.16458-1-rex-bc.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220630_210130_672708_DFB694C4 X-CRM114-Status: GOOD ( 10.57 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org For RGB colorimetry, CTA-861 support both limited and full range data when receiving video with RGB color space. We use drm_default_rgb_quant_range() to determine the correct setting. Signed-off-by: Bo-Chen Chen Reviewed-by: CK Hu Reviewed-by: AngeloGioacchino Del Regno --- drivers/gpu/drm/mediatek/mtk_dpi.c | 34 ++++++++++++++++++------------ 1 file changed, 21 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c index 3473ee18ad97..0855bbdfe4e1 100644 --- a/drivers/gpu/drm/mediatek/mtk_dpi.c +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c @@ -238,16 +238,30 @@ static void mtk_dpi_config_fb_size(struct mtk_dpi *dpi, u32 width, u32 height) mtk_dpi_mask(dpi, DPI_SIZE, height << VSIZE, VSIZE_MASK); } -static void mtk_dpi_config_channel_limit(struct mtk_dpi *dpi, - struct mtk_dpi_yc_limit *limit) +static void mtk_dpi_config_channel_limit(struct mtk_dpi *dpi) { - mtk_dpi_mask(dpi, DPI_Y_LIMIT, limit->y_bottom << Y_LIMINT_BOT, + struct mtk_dpi_yc_limit limit; + + if (drm_default_rgb_quant_range(&dpi->mode) == + HDMI_QUANTIZATION_RANGE_LIMITED) { + limit.y_bottom = 0x10; + limit.y_top = 0xfe0; + limit.c_bottom = 0x10; + limit.c_top = 0xfe0; + } else { + limit.y_bottom = 0; + limit.y_top = 0xfff; + limit.c_bottom = 0; + limit.c_top = 0xfff; + } + + mtk_dpi_mask(dpi, DPI_Y_LIMIT, limit.y_bottom << Y_LIMINT_BOT, Y_LIMINT_BOT_MASK); - mtk_dpi_mask(dpi, DPI_Y_LIMIT, limit->y_top << Y_LIMINT_TOP, + mtk_dpi_mask(dpi, DPI_Y_LIMIT, limit.y_top << Y_LIMINT_TOP, Y_LIMINT_TOP_MASK); - mtk_dpi_mask(dpi, DPI_C_LIMIT, limit->c_bottom << C_LIMIT_BOT, + mtk_dpi_mask(dpi, DPI_C_LIMIT, limit.c_bottom << C_LIMIT_BOT, C_LIMIT_BOT_MASK); - mtk_dpi_mask(dpi, DPI_C_LIMIT, limit->c_top << C_LIMIT_TOP, + mtk_dpi_mask(dpi, DPI_C_LIMIT, limit.c_top << C_LIMIT_TOP, C_LIMIT_TOP_MASK); } @@ -439,7 +453,6 @@ static int mtk_dpi_power_on(struct mtk_dpi *dpi) static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi, struct drm_display_mode *mode) { - struct mtk_dpi_yc_limit limit; struct mtk_dpi_polarities dpi_pol; struct mtk_dpi_sync_param hsync; struct mtk_dpi_sync_param vsync_lodd = { 0 }; @@ -474,11 +487,6 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi, dev_dbg(dpi->dev, "Got PLL %lu Hz, pixel clock %lu Hz\n", pll_rate, vm.pixelclock); - limit.c_bottom = 0x0010; - limit.c_top = 0x0FE0; - limit.y_bottom = 0x0010; - limit.y_top = 0x0FE0; - dpi_pol.ck_pol = MTK_DPI_POLARITY_FALLING; dpi_pol.de_pol = MTK_DPI_POLARITY_RISING; dpi_pol.hsync_pol = vm.flags & DISPLAY_FLAGS_HSYNC_HIGH ? @@ -526,7 +534,7 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi, else mtk_dpi_config_fb_size(dpi, vm.hactive, vm.vactive); - mtk_dpi_config_channel_limit(dpi, &limit); + mtk_dpi_config_channel_limit(dpi); mtk_dpi_config_bit_num(dpi, dpi->bit_num); mtk_dpi_config_channel_swap(dpi, dpi->channel_swap); mtk_dpi_config_yc_map(dpi, dpi->yc_map);