| Message ID | 20220720102817.237483-2-angelogioacchino.delregno@collabora.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | MT8195: Add reset for T-PHY (usb/pcie) | expand |
On Wed, 20 Jul 2022 12:28:16 +0200, AngeloGioacchino Del Regno wrote: > Add the reset index for USBSIF P1 (T-PHY port 1), used as either USB > or PCI-Express PHY reset. > > Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > --- > include/dt-bindings/reset/mt8195-resets.h | 1 + > 1 file changed, 1 insertion(+) > Acked-by: Rob Herring <robh@kernel.org>
Quoting AngeloGioacchino Del Regno (2022-07-20 03:28:16) > Add the reset index for USBSIF P1 (T-PHY port 1), used as either USB > or PCI-Express PHY reset. > > Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > --- Applied to clk-next
diff --git a/include/dt-bindings/reset/mt8195-resets.h b/include/dt-bindings/reset/mt8195-resets.h index 5471468c43b7..e61660438d61 100644 --- a/include/dt-bindings/reset/mt8195-resets.h +++ b/include/dt-bindings/reset/mt8195-resets.h @@ -33,6 +33,7 @@ #define MT8195_INFRA_RST4_THERM_CTRL_MCU_SWRST 2 #define MT8195_INFRA_RST2_PCIE_P0_SWRST 3 #define MT8195_INFRA_RST2_PCIE_P1_SWRST 4 +#define MT8195_INFRA_RST2_USBSIF_P1_SWRST 5 /* VDOSYS1 */ #define MT8195_VDOSYS1_SW0_RST_B_SMI_LARB2 0
Add the reset index for USBSIF P1 (T-PHY port 1), used as either USB or PCI-Express PHY reset. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- include/dt-bindings/reset/mt8195-resets.h | 1 + 1 file changed, 1 insertion(+)