From patchwork Thu Aug 11 02:58:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tinghan Shen X-Patchwork-Id: 12941127 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6253EC19F2D for ; Thu, 11 Aug 2022 04:00:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type:MIME-Version: References:In-Reply-To:Message-ID:Date:Subject:CC:To:From:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=XB6G09LPib0ZkaoEMPxS1Y+0TeJFHDnmpB6acMqZQUA=; b=o68WApywLMgHERsdG9sblKJDsy IxsI+Nr3AT53teaekK0sLChereE0eKDQ6tIqoRDC3JZVXtPVgzxW824D7o3Sn8EsjAkFUwsxjQuDb NBEXjhWwpT6IvElbgsuBGEn60JHdchCbVNmczH4mNRNgNBWZgs7pzYPY93KyXacCRmADUWnrZ7lqg tEzwqfOTUr4uXU7ySzPHwX1HWmitrcJq7jvz/wDBax0O3s1IKF5wDh9q4qFNCscgUKh5MANF3710z cwuGnOSYdJTqcENgGx+WNetCVZ/sQ7dFa5lbGtgBnJwPQllz9UEUY+7UuLbWQoKIzA2Q9vgVpydv6 voGACEQQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oLzMi-0050tv-TE; Thu, 11 Aug 2022 04:00:12 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oLzMX-0050qa-06; Thu, 11 Aug 2022 04:00:02 +0000 X-UUID: 640769088aa94b678b3739fe8aea90b8-20220810 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.9,REQID:2a9fe4d9-d49f-4940-94d6-2b064e26754b,OB:0,LO B:0,IP:0,URL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_H am,ACTION:release,TS:0 X-CID-META: VersionHash:3d8acc9,CLOUDID:0e78fcfc-9e71-4a0f-ba6b-417998daea35,C OID:IGNORED,Recheck:0,SF:nil,TC:nil,Content:0,EDM:-3,IP:nil,URL:0,File:nil ,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: 640769088aa94b678b3739fe8aea90b8-20220810 Received: from mtkmbs11n1.mediatek.inc [(172.21.101.185)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1022355395; Wed, 10 Aug 2022 20:59:54 -0700 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Thu, 11 Aug 2022 10:58:16 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Thu, 11 Aug 2022 10:58:16 +0800 From: Tinghan Shen To: Yong Wu , Joerg Roedel , Will Deacon , Robin Murphy , Rob Herring , Krzysztof Kozlowski , Lee Jones , Matthias Brugger , AngeloGioacchino Del Regno , Tinghan Shen , MandyJH Liu CC: , , , , , Subject: [PATCH v6 11/20] arm64: dts: mt8195: Add vdosys and vppsys clock nodes Date: Thu, 11 Aug 2022 10:58:04 +0800 Message-ID: <20220811025813.21492-12-tinghan.shen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220811025813.21492-1-tinghan.shen@mediatek.com> References: <20220811025813.21492-1-tinghan.shen@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220810_210001_085697_6C84534D X-CRM114-Status: UNSURE ( 9.76 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Add display clock nodes. Signed-off-by: Tinghan Shen Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi index 900aaa16f862f..8d59a7da32714 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -983,6 +983,12 @@ #clock-cells = <1>; }; + vppsys0: clock-controller@14000000 { + compatible = "mediatek,mt8195-vppsys0"; + reg = <0 0x14000000 0 0x1000>; + #clock-cells = <1>; + }; + wpesys: clock-controller@14e00000 { compatible = "mediatek,mt8195-wpesys"; reg = <0 0x14e00000 0 0x1000>; @@ -1001,6 +1007,12 @@ #clock-cells = <1>; }; + vppsys1: clock-controller@14f00000 { + compatible = "mediatek,mt8195-vppsys1"; + reg = <0 0x14f00000 0 0x1000>; + #clock-cells = <1>; + }; + imgsys: clock-controller@15000000 { compatible = "mediatek,mt8195-imgsys"; reg = <0 0x15000000 0 0x1000>; @@ -1108,5 +1120,17 @@ reg = <0 0x1b000000 0 0x1000>; #clock-cells = <1>; }; + + vdosys0: syscon@1c01a000 { + compatible = "mediatek,mt8195-mmsys", "syscon"; + reg = <0 0x1c01a000 0 0x1000>; + #clock-cells = <1>; + }; + + vdosys1: syscon@1c100000 { + compatible = "mediatek,mt8195-mmsys", "syscon"; + reg = <0 0x1c100000 0 0x1000>; + #clock-cells = <1>; + }; }; };