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[93.5.22.158]) by smtp.googlemail.com with ESMTPSA id m6-20020a1c2606000000b003c452678025sm6684633wmm.4.2022.10.14.01.45.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Oct 2022 01:45:34 -0700 (PDT) From: Alexandre Mergnat Date: Fri, 14 Oct 2022 10:45:30 +0200 Subject: [PATCH v4 2/3] iommu/mediatek: add support for 6-bit encoded port IDs MIME-Version: 1.0 Message-Id: <20221001-iommu-support-v4-2-f1e13438dfd2@baylibre.com> References: <20221001-iommu-support-v4-0-f1e13438dfd2@baylibre.com> In-Reply-To: <20221001-iommu-support-v4-0-f1e13438dfd2@baylibre.com> To: Rob Herring , Yong Wu , Krzysztof Kozlowski , Matthias Brugger , Robin Murphy , Joerg Roedel , Will Deacon Cc: linux-kernel@vger.kernel.org, Krzysztof Kozlowski , linux-mediatek@lists.infradead.org, Markus Schneider-Pargmann , Amjad Ouled-Ameur , Fabien Parent , devicetree@vger.kernel.org, Alexandre Mergnat , iommu@lists.linux.dev, AngeloGioacchino Del Regno , linux-arm-kernel@lists.infradead.org X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=2777; i=amergnat@baylibre.com; h=from:subject:message-id; bh=yHI2W23j32Eio+qvj5sArGXxqz+yEaFNsPuEi2F1ESI=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBjSSGr72jkaVUfd01lHWlH70E3IlRnthih2tTn4S8f oPgszB2JAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCY0khqwAKCRArRkmdfjHURZcfD/ 4twP9fhese84RdEddlF784ECS6fOnHpJuYrStpE0X919HpgvHrCs1hKdO/vMDvxXxpNuvmoxwQzRRd /DHc7ulpPRkZB9Qj7f3N2O6Cf3OEHLUF7j2+XMbhEJ+tCr2Qr5nby1EXGdam8gM0efQQRBCFx0b/wY Pa3usFg0YPDrhhd3MfEYBq3U/C7WgOKtfxIB89WB7asYOzXEJY4PzmT3hUEYn+8X8OzR4k0Te66CG8 Yi+j/vZepY4WkPWcL3ZYmu1DIbf6yUhitPo9gsuTeOFN9OpBOhzWrDJDQPL++LUZutFu9ZWK3HWjfc vtQKNzPPe8tRoMtgFF8s3bcgkuU4xepPuF6o628AsSbq6ffS3CgZ34T40kbsRGXaG3OA3sRIMAHEiz JhSY0qz22z45OrDrHnjeq1pfrD8KPqW/Sh1ELyWTd18ZlaHdTblGBP/uEvTdQED673ZJiS1YV/JWzI amTnWPPAIPyjY69yPGVthl0XAgtHtvQ0fJKUdo8mCQiwFtkqtCmZHRXUE5BJbvI8aWaZnJNjjSJ8kp 7lGNUDntkhM1QGbZV+7eOV+K4pts5qbShv2iJfnEqUYYY0M3v8CxZV+Kgtz6cWp2wlh+G0CS5FtiMr KhyD1CZsisr9qmOML0uw8LqV4djKDRTsdLnWFYLQXcvKc/yRuZ5aumwLPw0g== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221014_014537_173464_351C70B9 X-CRM114-Status: GOOD ( 13.46 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org From: Fabien Parent Until now the port ID was always encoded as a 5-bit data. On MT8365, the port ID is encoded as a 6-bit data. This requires to add extra macro F_MMU_INT_ID_LARB_ID_EXT, and F_MMU_INT_ID_PORT_ID_EXT in order to support 6-bit encoded port IDs. Signed-off-by: Fabien Parent Signed-off-by: Markus Schneider-Pargmann Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Alexandre Mergnat --- drivers/iommu/mtk_iommu.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c index 5a4e00e4bbbc..50195a900611 100644 --- a/drivers/iommu/mtk_iommu.c +++ b/drivers/iommu/mtk_iommu.c @@ -108,8 +108,12 @@ #define F_MMU_INT_ID_SUB_COMM_ID(a) (((a) >> 7) & 0x3) #define F_MMU_INT_ID_COMM_ID_EXT(a) (((a) >> 10) & 0x7) #define F_MMU_INT_ID_SUB_COMM_ID_EXT(a) (((a) >> 7) & 0x7) +/* Macro for 5 bits length port ID field (default) */ #define F_MMU_INT_ID_LARB_ID(a) (((a) >> 7) & 0x7) #define F_MMU_INT_ID_PORT_ID(a) (((a) >> 2) & 0x1f) +/* Macro for 6 bits length port ID field */ +#define F_MMU_INT_ID_LARB_ID_EXT(a) (((a) >> 8) & 0x7) +#define F_MMU_INT_ID_PORT_ID_EXT(a) (((a) >> 2) & 0x3f) #define MTK_PROTECT_PA_ALIGN 256 #define MTK_IOMMU_BANK_SZ 0x1000 @@ -139,6 +143,7 @@ #define IFA_IOMMU_PCIE_SUPPORT BIT(16) #define PGTABLE_PA_35_EN BIT(17) #define TF_PORT_TO_ADDR_MT8173 BIT(18) +#define HAS_INT_ID_PORT_WIDTH_6 BIT(19) #define MTK_IOMMU_HAS_FLAG_MASK(pdata, _x, mask) \ ((((pdata)->flags) & (mask)) == (_x)) @@ -441,7 +446,11 @@ static irqreturn_t mtk_iommu_isr(int irq, void *dev_id) fault_pa |= (u64)pa34_32 << 32; if (MTK_IOMMU_IS_TYPE(plat_data, MTK_IOMMU_TYPE_MM)) { - fault_port = F_MMU_INT_ID_PORT_ID(regval); + if (MTK_IOMMU_HAS_FLAG(plat_data, HAS_INT_ID_PORT_WIDTH_6)) { + fault_port = F_MMU_INT_ID_PORT_ID_EXT(regval); + } else { + fault_port = F_MMU_INT_ID_PORT_ID(regval); + } if (MTK_IOMMU_HAS_FLAG(plat_data, HAS_SUB_COMM_2BITS)) { fault_larb = F_MMU_INT_ID_COMM_ID(regval); sub_comm = F_MMU_INT_ID_SUB_COMM_ID(regval); @@ -449,7 +458,11 @@ static irqreturn_t mtk_iommu_isr(int irq, void *dev_id) fault_larb = F_MMU_INT_ID_COMM_ID_EXT(regval); sub_comm = F_MMU_INT_ID_SUB_COMM_ID_EXT(regval); } else { - fault_larb = F_MMU_INT_ID_LARB_ID(regval); + if (MTK_IOMMU_HAS_FLAG(plat_data, HAS_INT_ID_PORT_WIDTH_6)) { + fault_larb = F_MMU_INT_ID_LARB_ID_EXT(regval); + } else { + fault_larb = F_MMU_INT_ID_LARB_ID(regval); + } } fault_larb = data->plat_data->larbid_remap[fault_larb][sub_comm]; }