| Message ID | 20221022090530.16265-4-linux@fw-web.de (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add mmc-support for mt7986 | expand |
On 22/10/2022 05:05, Frank Wunderlich wrote: > From: Nícolas F. R. A. Prado <nfraprado@collabora.com> > > The binding was describing a single clock list for all platforms, but > that's not really suitable: mt2712 requires an extra 'bus_clk' on some > of its controllers, while mt8192 requires four different extra clocks. > The rest of the platforms can share the same 3 clocks, with the third > being optional as it's not present on all platforms. It was also wrong... > > Move the clock definitions inside if blocks that match on the > compatibles. In practice this gets rid of dtbs_check warnings on mt8192, > since the 'bus_clk' clock from mt2712 is no longer expected on this > platform. > > Fixes: 59a23395d8aa ("dt-bindings: mmc: Add support for MT8192 SoC") > Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> > Signed-off-by: Frank Wunderlich <frank-w@public-files.de> > --- > .../devicetree/bindings/mmc/mtk-sd.yaml | 111 +++++++++++++----- > 1 file changed, 81 insertions(+), 30 deletions(-) > > diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml > index 3cbf0208f1b4..c7bcf0c3dd5d 100644 > --- a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml > +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml > @@ -10,9 +10,6 @@ maintainers: > - Chaotian Jing <chaotian.jing@mediatek.com> > - Wenbin Mei <wenbin.mei@mediatek.com> > > -allOf: > - - $ref: mmc-controller.yaml# > - > properties: > compatible: > oneOf: > @@ -49,27 +46,11 @@ properties: > description: > Should contain phandle for the clock feeding the MMC controller. > minItems: 2 > - items: > - - description: source clock (required). > - - description: HCLK which used for host (required). > - - description: independent source clock gate (required for MT2712). > - - description: bus clock used for internal register access (required for MT2712 MSDC0/3). > - - description: msdc subsys clock gate (required for MT8192). > - - description: peripheral bus clock gate (required for MT8192). > - - description: AXI bus clock gate (required for MT8192). > - - description: AHB bus clock gate (required for MT8192). > + maxItems: 7 Confusing to see 8 clocks replaced by 7, but I guess this is problem of old bindings. > > clock-names: > minItems: 2 > - items: > - - const: source > - - const: hclk > - - const: source_cg > - - const: bus_clk > - - const: sys_cg > - - const: pclk_cg > - - const: axi_cg > - - const: ahb_cg > + maxItems: 7 > > interrupts: > description: > @@ -191,15 +172,85 @@ required: > - vmmc-supply > - vqmmc-supply > > -if: > - properties: > - compatible: > - contains: > - const: mediatek,mt8183-mmc > -then: > - properties: > - reg: > - minItems: 2 > +allOf: > + - $ref: mmc-controller.yaml# > + - if: > + properties: > + compatible: > + contains: > + const: mediatek,mt8183-mmc > + then: > + properties: > + reg: > + minItems: 2 Blank line > + - if: > + properties: > + compatible: > + contains: > + const: mediatek,mt8192-mmc > + then: > + properties: > + clocks: > + items: > + - description: source clock > + - description: HCLK which used for host > + - description: independent source clock gate > + - description: msdc subsys clock gate > + - description: peripheral bus clock gate > + - description: AXI bus clock gate > + - description: AHB bus clock gate > + clock-names: > + items: > + - const: source > + - const: hclk > + - const: source_cg > + - const: sys_cg > + - const: pclk_cg > + - const: axi_cg > + - const: ahb_cg Blank line > + - if: > + properties: > + compatible: > + contains: > + const: mediatek,mt2712-mmc > + then: > + properties: > + clocks: > + minItems: 3 > + items: > + - description: source clock > + - description: HCLK which used for host > + - description: independent source clock gate > + - description: bus clock used for internal register access (required for MSDC0/3). > + clock-names: > + minItems: 3 > + items: > + - const: source > + - const: hclk > + - const: source_cg > + - const: bus_clk Blank line > + - if: > + not: Can you not use negation, but list applicable compatibles? It would be easier to read, I think > + properties: > + compatible: > + contains: > + enum: > + - mediatek,mt2712-mmc > + - mediatek,mt8192-mmc Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml index 3cbf0208f1b4..c7bcf0c3dd5d 100644 --- a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml @@ -10,9 +10,6 @@ maintainers: - Chaotian Jing <chaotian.jing@mediatek.com> - Wenbin Mei <wenbin.mei@mediatek.com> -allOf: - - $ref: mmc-controller.yaml# - properties: compatible: oneOf: @@ -49,27 +46,11 @@ properties: description: Should contain phandle for the clock feeding the MMC controller. minItems: 2 - items: - - description: source clock (required). - - description: HCLK which used for host (required). - - description: independent source clock gate (required for MT2712). - - description: bus clock used for internal register access (required for MT2712 MSDC0/3). - - description: msdc subsys clock gate (required for MT8192). - - description: peripheral bus clock gate (required for MT8192). - - description: AXI bus clock gate (required for MT8192). - - description: AHB bus clock gate (required for MT8192). + maxItems: 7 clock-names: minItems: 2 - items: - - const: source - - const: hclk - - const: source_cg - - const: bus_clk - - const: sys_cg - - const: pclk_cg - - const: axi_cg - - const: ahb_cg + maxItems: 7 interrupts: description: @@ -191,15 +172,85 @@ required: - vmmc-supply - vqmmc-supply -if: - properties: - compatible: - contains: - const: mediatek,mt8183-mmc -then: - properties: - reg: - minItems: 2 +allOf: + - $ref: mmc-controller.yaml# + - if: + properties: + compatible: + contains: + const: mediatek,mt8183-mmc + then: + properties: + reg: + minItems: 2 + - if: + properties: + compatible: + contains: + const: mediatek,mt8192-mmc + then: + properties: + clocks: + items: + - description: source clock + - description: HCLK which used for host + - description: independent source clock gate + - description: msdc subsys clock gate + - description: peripheral bus clock gate + - description: AXI bus clock gate + - description: AHB bus clock gate + clock-names: + items: + - const: source + - const: hclk + - const: source_cg + - const: sys_cg + - const: pclk_cg + - const: axi_cg + - const: ahb_cg + - if: + properties: + compatible: + contains: + const: mediatek,mt2712-mmc + then: + properties: + clocks: + minItems: 3 + items: + - description: source clock + - description: HCLK which used for host + - description: independent source clock gate + - description: bus clock used for internal register access (required for MSDC0/3). + clock-names: + minItems: 3 + items: + - const: source + - const: hclk + - const: source_cg + - const: bus_clk + - if: + not: + properties: + compatible: + contains: + enum: + - mediatek,mt2712-mmc + - mediatek,mt8192-mmc + then: + properties: + clocks: + minItems: 2 + items: + - description: source clock + - description: HCLK which used for host + - description: independent source clock gate + clock-names: + minItems: 2 + items: + - const: source + - const: hclk + - const: source_cg unevaluatedProperties: false