diff mbox series

[v4,1/3] dt-bindings: PCI: mediatek-gen3: Support mt8195

Message ID 20221028094317.29270-2-tinghan.shen@mediatek.com (mailing list archive)
State New, archived
Headers show
Series Add driver nodes for MT8195 SoC | expand

Commit Message

Tinghan Shen Oct. 28, 2022, 9:43 a.m. UTC
From: Jianjun Wang <jianjun.wang@mediatek.com>

In order to support mt8195 pcie node, update the yaml to support new
properties of iommu and power-domain, and update the reset-names
property to allow only one 'mac' name.

Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
Signed-off-by: TingHan Shen <tinghan.shen@mediatek.com>
---
 .../bindings/pci/mediatek-pcie-gen3.yaml         | 16 +++++++++++++---
 1 file changed, 13 insertions(+), 3 deletions(-)

Comments

AngeloGioacchino Del Regno Oct. 31, 2022, 1:28 p.m. UTC | #1
Il 28/10/22 11:43, Tinghan Shen ha scritto:
> From: Jianjun Wang <jianjun.wang@mediatek.com>
> 
> In order to support mt8195 pcie node, update the yaml to support new
> properties of iommu and power-domain, and update the reset-names
> property to allow only one 'mac' name.
> 
> Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
> Signed-off-by: TingHan Shen <tinghan.shen@mediatek.com>
> ---
>   .../bindings/pci/mediatek-pcie-gen3.yaml         | 16 +++++++++++++---
>   1 file changed, 13 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> index c00be39af64e..a9013c10131a 100644
> --- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> @@ -70,14 +70,21 @@ properties:
>       minItems: 1
>       maxItems: 8
>   
> +  iommu-map:
> +    maxItems: 1
> +
> +  iommu-map-mask:
> +    const: 0
> +
>     resets:
>       minItems: 1
>       maxItems: 2
>   
>     reset-names:
> -    minItems: 1
> -    items:
> -      - const: phy
> +    oneOf:
> +      - items:
> +          - const: phy
> +          - const: mac
>         - const: mac

Sorry, this looks a bit messy.

I can propose two solutions, either:

reset-names:
   minItems: 1
   items:
     - const: mac
     - const: phy
... and change the order in mt8192.dtsi;

otherwise, something like
allOf:
   - if:
      properties:
        compatible:
          contains:
            - const: mediatek,mt8195-pcie
     ... invert reset-names

I think that the first solution makes a bit more sense though, as the
PHY reset may be moved in a PCIE-PHY specific driver instead of being
managed here in pci-mediatek-gen3.

Regards,
Angelo
Rob Herring (Arm) Oct. 31, 2022, 6:39 p.m. UTC | #2
On Mon, Oct 31, 2022 at 02:28:54PM +0100, AngeloGioacchino Del Regno wrote:
> Il 28/10/22 11:43, Tinghan Shen ha scritto:
> > From: Jianjun Wang <jianjun.wang@mediatek.com>
> > 
> > In order to support mt8195 pcie node, update the yaml to support new
> > properties of iommu and power-domain, and update the reset-names
> > property to allow only one 'mac' name.
> > 
> > Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
> > Signed-off-by: TingHan Shen <tinghan.shen@mediatek.com>
> > ---
> >   .../bindings/pci/mediatek-pcie-gen3.yaml         | 16 +++++++++++++---
> >   1 file changed, 13 insertions(+), 3 deletions(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> > index c00be39af64e..a9013c10131a 100644
> > --- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> > +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> > @@ -70,14 +70,21 @@ properties:
> >       minItems: 1
> >       maxItems: 8
> > +  iommu-map:
> > +    maxItems: 1
> > +
> > +  iommu-map-mask:
> > +    const: 0
> > +
> >     resets:
> >       minItems: 1
> >       maxItems: 2
> >     reset-names:
> > -    minItems: 1
> > -    items:
> > -      - const: phy
> > +    oneOf:
> > +      - items:
> > +          - const: phy
> > +          - const: mac
> >         - const: mac
> 
> Sorry, this looks a bit messy.
> 
> I can propose two solutions, either:
> 
> reset-names:
>   minItems: 1
>   items:
>     - const: mac
>     - const: phy
> ... and change the order in mt8192.dtsi;

That doesn't work because originally 'phy' alone was allowed.

You could do:

minItems: 1
maxItems: 2
items:
  enum: [ phy, mac ]

But for 2 items, either order would be allowed. Not great, but not a 
huge deal.

> otherwise, something like
> allOf:
>   - if:
>      properties:
>        compatible:
>          contains:
>            - const: mediatek,mt8195-pcie
>     ... invert reset-names
> 
> I think that the first solution makes a bit more sense though, as the
> PHY reset may be moved in a PCIE-PHY specific driver instead of being
> managed here in pci-mediatek-gen3.

That either makes sense or it doesn't. If it does, then you should go 
ahead and separate the phy rather than change the ABI twice.

Rob
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
index c00be39af64e..a9013c10131a 100644
--- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
+++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
@@ -70,14 +70,21 @@  properties:
     minItems: 1
     maxItems: 8
 
+  iommu-map:
+    maxItems: 1
+
+  iommu-map-mask:
+    const: 0
+
   resets:
     minItems: 1
     maxItems: 2
 
   reset-names:
-    minItems: 1
-    items:
-      - const: phy
+    oneOf:
+      - items:
+          - const: phy
+          - const: mac
       - const: mac
 
   clocks:
@@ -107,6 +114,9 @@  properties:
     items:
       - const: pcie-phy
 
+  power-domains:
+    maxItems: 1
+
   '#interrupt-cells':
     const: 1