| Message ID | 20221106085034.12582-6-linux@fw-web.de (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add BananaPi R3 | expand |
On 06/11/2022 09:50, Frank Wunderlich wrote: > From: Sam Shih <sam.shih@mediatek.com> > > This patch adds mmc support for MT7986. > > Signed-off-by: Sam Shih <sam.shih@mediatek.com> > Signed-off-by: Frank Wunderlich <frank-w@public-files.de> > --- > v3: > - fix pullups/pulldowns for mt7986a-rfb to have generic bias-pull-* > > v2: > - update mmc-node because clocks changed > --- > arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 87 ++++++++++++++++++++ > arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 15 ++++ > 2 files changed, 102 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts > index 2b5d7ea31b4d..e1a0331aaa5f 100644 > --- a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts > +++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts > @@ -5,6 +5,8 @@ > */ > > /dts-v1/; > +#include <dt-bindings/pinctrl/mt65xx.h> > + > #include "mt7986a.dtsi" > > / { > @@ -24,6 +26,15 @@ memory@40000000 { > reg = <0 0x40000000 0 0x40000000>; > }; > > + reg_1p8v: regulator-1p8v { > + compatible = "regulator-fixed"; > + regulator-name = "fixed-1.8V"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-boot-on; > + regulator-always-on; > + }; > + > reg_3p3v: regulator-3p3v { > compatible = "regulator-fixed"; > regulator-name = "fixed-3.3V"; > @@ -76,7 +87,83 @@ switch: switch@0 { > }; > }; > > +&mmc0 { > + pinctrl-names = "default", "state_uhs"; > + pinctrl-0 = <&mmc0_pins_default>; > + pinctrl-1 = <&mmc0_pins_uhs>; > + bus-width = <8>; > + max-frequency = <200000000>; > + cap-mmc-highspeed; > + mmc-hs200-1_8v; > + mmc-hs400-1_8v; > + hs400-ds-delay = <0x14014>; > + vmmc-supply = <®_3p3v>; > + vqmmc-supply = <®_1p8v>; > + non-removable; > + no-sd; > + no-sdio; > + status = "okay"; > +}; > + > &pio { > + mmc0_pins_default: mmc0-pins { > + mux { > + function = "emmc"; > + groups = "emmc_51"; Waiting on https://patchwork.kernel.org/project/linux-mediatek/patch/20221106080114.7426-3-linux@fw-web.de/ Please correct me if I'm wrong. Matthias > + }; > + conf-cmd-dat { > + pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", > + "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", > + "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; > + input-enable; > + drive-strength = <4>; > + bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */ > + }; > + conf-clk { > + pins = "EMMC_CK"; > + drive-strength = <6>; > + bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */ > + }; > + conf-ds { > + pins = "EMMC_DSL"; > + bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */ > + }; > + conf-rst { > + pins = "EMMC_RSTB"; > + drive-strength = <4>; > + bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */ > + }; > + }; > + > + mmc0_pins_uhs: mmc0-uhs-pins { > + mux { > + function = "emmc"; > + groups = "emmc_51"; > + }; > + conf-cmd-dat { > + pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", > + "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", > + "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; > + input-enable; > + drive-strength = <4>; > + bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */ > + }; > + conf-clk { > + pins = "EMMC_CK"; > + drive-strength = <6>; > + bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */ > + }; > + conf-ds { > + pins = "EMMC_DSL"; > + bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */ > + }; > + conf-rst { > + pins = "EMMC_RSTB"; > + drive-strength = <4>; > + bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */ > + }; > + }; > + > spi_flash_pins: spi-flash-pins { > mux { > function = "spi"; > diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi > index 1c7a973c28ca..32c26b239ae6 100644 > --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi > @@ -284,6 +284,21 @@ ssusb: usb@11200000 { > status = "disabled"; > }; > > + mmc0: mmc@11230000 { > + compatible = "mediatek,mt7986-mmc"; > + reg = <0 0x11230000 0 0x1000>, > + <0 0x11c20000 0 0x1000>; > + interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&topckgen CLK_TOP_EMMC_416M_SEL>, > + <&infracfg CLK_INFRA_MSDC_HCK_CK>, > + <&infracfg CLK_INFRA_MSDC_CK>, > + <&infracfg CLK_INFRA_MSDC_133M_CK>, > + <&infracfg CLK_INFRA_MSDC_66M_CK>; > + clock-names = "source", "hclk", "source_cg", "bus_clk", > + "sys_cg"; > + status = "disabled"; > + }; > + > usb_phy: t-phy@11e10000 { > compatible = "mediatek,mt7986-tphy", > "mediatek,generic-tphy-v2";
Hi > Gesendet: Freitag, 11. November 2022 um 09:58 Uhr > Von: "Matthias Brugger" <matthias.bgg@gmail.com> > > &pio { > > + mmc0_pins_default: mmc0-pins { > > + mux { > > + function = "emmc"; > > + groups = "emmc_51"; > > Waiting on > https://patchwork.kernel.org/project/linux-mediatek/patch/20221106080114.7426-3-linux@fw-web.de/ > > Please correct me if I'm wrong. this (newer version with some pinctrl-fixes) is applied to linus pinctrl tree https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git/commit/?h=for-next&id=c115e7f51e685536ecb885854bdd4b3f225ff3e4 > Matthias regards Frank
diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts index 2b5d7ea31b4d..e1a0331aaa5f 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts +++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts @@ -5,6 +5,8 @@ */ /dts-v1/; +#include <dt-bindings/pinctrl/mt65xx.h> + #include "mt7986a.dtsi" / { @@ -24,6 +26,15 @@ memory@40000000 { reg = <0 0x40000000 0 0x40000000>; }; + reg_1p8v: regulator-1p8v { + compatible = "regulator-fixed"; + regulator-name = "fixed-1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + reg_3p3v: regulator-3p3v { compatible = "regulator-fixed"; regulator-name = "fixed-3.3V"; @@ -76,7 +87,83 @@ switch: switch@0 { }; }; +&mmc0 { + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc0_pins_default>; + pinctrl-1 = <&mmc0_pins_uhs>; + bus-width = <8>; + max-frequency = <200000000>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + hs400-ds-delay = <0x14014>; + vmmc-supply = <®_3p3v>; + vqmmc-supply = <®_1p8v>; + non-removable; + no-sd; + no-sdio; + status = "okay"; +}; + &pio { + mmc0_pins_default: mmc0-pins { + mux { + function = "emmc"; + groups = "emmc_51"; + }; + conf-cmd-dat { + pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", + "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", + "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; + input-enable; + drive-strength = <4>; + bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */ + }; + conf-clk { + pins = "EMMC_CK"; + drive-strength = <6>; + bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */ + }; + conf-ds { + pins = "EMMC_DSL"; + bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */ + }; + conf-rst { + pins = "EMMC_RSTB"; + drive-strength = <4>; + bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */ + }; + }; + + mmc0_pins_uhs: mmc0-uhs-pins { + mux { + function = "emmc"; + groups = "emmc_51"; + }; + conf-cmd-dat { + pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", + "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", + "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; + input-enable; + drive-strength = <4>; + bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */ + }; + conf-clk { + pins = "EMMC_CK"; + drive-strength = <6>; + bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */ + }; + conf-ds { + pins = "EMMC_DSL"; + bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */ + }; + conf-rst { + pins = "EMMC_RSTB"; + drive-strength = <4>; + bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */ + }; + }; + spi_flash_pins: spi-flash-pins { mux { function = "spi"; diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi index 1c7a973c28ca..32c26b239ae6 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi @@ -284,6 +284,21 @@ ssusb: usb@11200000 { status = "disabled"; }; + mmc0: mmc@11230000 { + compatible = "mediatek,mt7986-mmc"; + reg = <0 0x11230000 0 0x1000>, + <0 0x11c20000 0 0x1000>; + interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&topckgen CLK_TOP_EMMC_416M_SEL>, + <&infracfg CLK_INFRA_MSDC_HCK_CK>, + <&infracfg CLK_INFRA_MSDC_CK>, + <&infracfg CLK_INFRA_MSDC_133M_CK>, + <&infracfg CLK_INFRA_MSDC_66M_CK>; + clock-names = "source", "hclk", "source_cg", "bus_clk", + "sys_cg"; + status = "disabled"; + }; + usb_phy: t-phy@11e10000 { compatible = "mediatek,mt7986-tphy", "mediatek,generic-tphy-v2";