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[90.63.244.31]) by smtp.googlemail.com with ESMTPSA id i14-20020a05600c354e00b003d1d5a83b2esm45040928wmq.35.2023.01.17.00.49.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Jan 2023 00:49:54 -0800 (PST) From: Alexandre Mergnat Date: Tue, 17 Jan 2023 09:49:41 +0100 Subject: [PATCH 3/4] arm64: dts: mediatek: enable i2c0 for mt8365-evk board MIME-Version: 1.0 Message-Id: <20221122-mt8365-i2c-support-v1-3-4aeb7c54c67b@baylibre.com> References: <20221122-mt8365-i2c-support-v1-0-4aeb7c54c67b@baylibre.com> In-Reply-To: <20221122-mt8365-i2c-support-v1-0-4aeb7c54c67b@baylibre.com> To: Rob Herring , Qii Wang , Krzysztof Kozlowski , Matthias Brugger Cc: linux-i2c@vger.kernel.org, Rob Herring , Fabien Parent , linux-arm-kernel@lists.infradead.org, Alexandre Mergnat , Kevin Hilman , linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=1340; i=amergnat@baylibre.com; h=from:subject:message-id; bh=VOgzUWYZ5LqJIocyR/msYYzp26C90wB0hqeJ/d6bEGk=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBjxmEu/1ATFrLnz4wZ5FHf5BjXYBtuHu6+qKyasU1/ oquOHiOJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCY8ZhLgAKCRArRkmdfjHURRfJEA Cc8GST/9irlHGIql2YtIHfbd9HQu1ah91IpB36SZWBJ1g9wwyeKf717wTh56hqNAk1XtGyWlCWaKUg dqIYRlZUB3HgoB0Mp6rgZLakIRV8+Nuz2GrLGcOqfRJDK8qUIQRY8WFHC38AbnQ+aqOkXsWqcRBbPu UnNJ6rR93Wzz4HuEQBx/PfZObcu/XlPvZgQ8zVvbbkDsvjm6viTW7RSEW1Epqrg2d3tgD7f7VzZhUP 47+m5NgJRAiy/2gp3hyn6OE9w5TfRm1fQ8TThmZRTusk/bmozRM5N4wDuQqcmxRumio69SCQDjyc09 XkQ8fPIp0fA8Yc0T+b19ftVXI/FEoTrOvUYvYoF6FFb3yfGZPrsfuWGRA38IEXVTH7KP0YZsYFajQQ G9UJtyrFB/ray4flboMovBDwOkdoUGflFSf/dPhTF3RlvxBVhzCGH23BsZHClZcoVpKHowuljXTws4 TWdqBz/Uq4gE41F9a3DUzMH8tbejAgu5Kcvb4FlIMPOuBkERVVb/jaWcXnjsG1aOlmu7NbIE7OtgJ5 OJrzLRYCZq5BF6cKyxtEL5/KCYwt7MA958VDbeR5phILWFgh7tTnh0P5ilQvRgrbFVoS5hwKvEuW2d TpjzBvM+1lYxsEadLGbHFyVT53ay0BQSFGlhw4HlxvoFj6K3jCUahD9T4Mdw== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230117_004957_056902_C2E67C02 X-CRM114-Status: UNSURE ( 8.98 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Enable the I2C0 bus provides communication with: - The integrated RT9466 Switching Battery Charger. - The integrated MT6691 LP4X buck for VDDQ. - The integrated MT6691 LP4X buck for VDD2. - The pin header, to plug external I2C devices. Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt8365-evk.dts | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts index 275ea3a0e708..d5d76a7dbd82 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts +++ b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts @@ -88,6 +88,15 @@ optee_reserved: optee@43200000 { }; }; +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + clock-frequency = <100000>; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; +}; + &pio { gpio_keys: gpio-keys-pins { pins { @@ -97,6 +106,16 @@ pins { }; }; + i2c0_pins: i2c0 { + pins_i2c { + pinmux = , + ; + mediatek,pull-up-adv = <3>; + mediatek,drive-strength-adv = <00>; + bias-pull-up; + }; + }; + uart0_pins: uart0-pins { pins { pinmux = ,