diff mbox series

[v2,4/9] mtd: nand: ecc-mtk: Add ECC support fot MT7986 IC

Message ID 20221205065756.26875-5-xiangsheng.hou@mediatek.com (mailing list archive)
State New, archived
Headers show
Series Add MediaTek MT7986 SPI NAND and ECC support | expand

Commit Message

Xiangsheng Hou Dec. 5, 2022, 6:57 a.m. UTC
Add ECC support fot MT7986 IC.

Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
---
 drivers/mtd/nand/ecc-mtk.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

Comments

AngeloGioacchino Del Regno Dec. 5, 2022, 2:21 p.m. UTC | #1
Il 05/12/22 07:57, Xiangsheng Hou ha scritto:
> Add ECC support fot MT7986 IC.
> 
> Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
> ---
>   drivers/mtd/nand/ecc-mtk.c | 18 ++++++++++++++++++
>   1 file changed, 18 insertions(+)
> 
> diff --git a/drivers/mtd/nand/ecc-mtk.c b/drivers/mtd/nand/ecc-mtk.c
> index 9f9b201fe706..c2f6cfa76a04 100644
> --- a/drivers/mtd/nand/ecc-mtk.c
> +++ b/drivers/mtd/nand/ecc-mtk.c
> @@ -79,6 +79,10 @@ static const u8 ecc_strength_mt7622[] = {
>   	4, 6, 8, 10, 12
>   };
>   
> +static const u8 ecc_strength_mt7986[] = {
> +	4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24
> +};
> +
>   enum mtk_ecc_regs {
>   	ECC_ENCPAR00,
>   	ECC_ENCIRQ_EN,
> @@ -483,6 +487,17 @@ static const struct mtk_ecc_caps mtk_ecc_caps_mt7622 = {
>   	.pg_irq_sel = 0,
>   };
>   
> +static const struct mtk_ecc_caps mtk_ecc_caps_mt7986 = {
> +	.err_mask = 0x1f,

Can't we use GENMASK() to define err_mask instead?

#define MT7986_ERRNUM	GENMASK(4, 0)

P.S.: Did I get that right? Is that referred to the ERRNUM(x) bits?

Regards,
Angelo
Xiangsheng Hou Dec. 6, 2022, 9:04 a.m. UTC | #2
Hi Angelo,

On Mon, 2022-12-05 at 15:21 +0100, AngeloGioacchino Del Regno wrote:
> Il 05/12/22 07:57, Xiangsheng Hou ha scritto:
> > Add ECC support fot MT7986 IC.
> > 
> > Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
> > ---
> >   drivers/mtd/nand/ecc-mtk.c | 18 ++++++++++++++++++
> >   1 file changed, 18 insertions(+)
> > 
> > diff --git a/drivers/mtd/nand/ecc-mtk.c b/drivers/mtd/nand/ecc-
> > mtk.c
> > index 9f9b201fe706..c2f6cfa76a04 100644
> > --- a/drivers/mtd/nand/ecc-mtk.c
> > +++ b/drivers/mtd/nand/ecc-mtk.c
> > @@ -79,6 +79,10 @@ static const u8 ecc_strength_mt7622[] = {
> >   	4, 6, 8, 10, 12
> >   };
> >   
> > +static const u8 ecc_strength_mt7986[] = {
> > +	4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24
> > +};
> > +
> >   enum mtk_ecc_regs {
> >   	ECC_ENCPAR00,
> >   	ECC_ENCIRQ_EN,
> > @@ -483,6 +487,17 @@ static const struct mtk_ecc_caps
> > mtk_ecc_caps_mt7622 = {
> >   	.pg_irq_sel = 0,
> >   };
> >   
> > +static const struct mtk_ecc_caps mtk_ecc_caps_mt7986 = {
> > +	.err_mask = 0x1f,
> 
> Can't we use GENMASK() to define err_mask instead?
> 
> #define MT7986_ERRNUM	GENMASK(4, 0)
> 
> P.S.: Did I get that right? Is that referred to the ERRNUM(x) bits

Yes, you are right.
I will change like
#define ECC_ERRMASK(x) GENMASK(x, 0),
since other IC driver data will use 0x3f and 0x7f err_mask.


Thanks
Xiangsheng Hou
AngeloGioacchino Del Regno Dec. 6, 2022, 12:22 p.m. UTC | #3
Il 06/12/22 10:04, Xiangsheng Hou (侯祥胜) ha scritto:
> Hi Angelo,
> 
> On Mon, 2022-12-05 at 15:21 +0100, AngeloGioacchino Del Regno wrote:
>> Il 05/12/22 07:57, Xiangsheng Hou ha scritto:
>>> Add ECC support fot MT7986 IC.
>>>
>>> Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
>>> ---
>>>    drivers/mtd/nand/ecc-mtk.c | 18 ++++++++++++++++++
>>>    1 file changed, 18 insertions(+)
>>>
>>> diff --git a/drivers/mtd/nand/ecc-mtk.c b/drivers/mtd/nand/ecc-
>>> mtk.c
>>> index 9f9b201fe706..c2f6cfa76a04 100644
>>> --- a/drivers/mtd/nand/ecc-mtk.c
>>> +++ b/drivers/mtd/nand/ecc-mtk.c
>>> @@ -79,6 +79,10 @@ static const u8 ecc_strength_mt7622[] = {
>>>    	4, 6, 8, 10, 12
>>>    };
>>>    
>>> +static const u8 ecc_strength_mt7986[] = {
>>> +	4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24
>>> +};
>>> +
>>>    enum mtk_ecc_regs {
>>>    	ECC_ENCPAR00,
>>>    	ECC_ENCIRQ_EN,
>>> @@ -483,6 +487,17 @@ static const struct mtk_ecc_caps
>>> mtk_ecc_caps_mt7622 = {
>>>    	.pg_irq_sel = 0,
>>>    };
>>>    
>>> +static const struct mtk_ecc_caps mtk_ecc_caps_mt7986 = {
>>> +	.err_mask = 0x1f,
>>
>> Can't we use GENMASK() to define err_mask instead?
>>
>> #define MT7986_ERRNUM	GENMASK(4, 0)
>>
>> P.S.: Did I get that right? Is that referred to the ERRNUM(x) bits
> 
> Yes, you are right.
> I will change like
> #define ECC_ERRMASK(x) GENMASK(x, 0),
> since other IC driver data will use 0x3f and 0x7f err_mask.
> 

I would prefer, instead, something like

#define MT7986_ERRNUM	GENMASK(....)
#define MT7622_ERRNUM	GENMASK(....)
#define MT.... (etc)

instead of a macro calling another macro.

Regards,
Angelo
Xiangsheng Hou Dec. 7, 2022, 2:01 a.m. UTC | #4
On Tue, 2022-12-06 at 13:22 +0100, AngeloGioacchino Del Regno wrote:
> Il 06/12/22 10:04, Xiangsheng Hou (侯祥胜) ha scritto:
> > Hi Angelo,
> > 
> > On Mon, 2022-12-05 at 15:21 +0100, AngeloGioacchino Del Regno
> > wrote:
> > > Il 05/12/22 07:57, Xiangsheng Hou ha scritto:
> > > > Add ECC support fot MT7986 IC.
> > > > 
> > > > Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
> > > > ---
> > > >    drivers/mtd/nand/ecc-mtk.c | 18 ++++++++++++++++++
> > > >    1 file changed, 18 insertions(+)
> > > > 
> > > > diff --git a/drivers/mtd/nand/ecc-mtk.c b/drivers/mtd/nand/ecc-
> > > > mtk.c
> > > > index 9f9b201fe706..c2f6cfa76a04 100644
> > > > --- a/drivers/mtd/nand/ecc-mtk.c
> > > > +++ b/drivers/mtd/nand/ecc-mtk.c
> > > > @@ -79,6 +79,10 @@ static const u8 ecc_strength_mt7622[] = {
> > > >    	4, 6, 8, 10, 12
> > > >    };
> > > >    
> > > > +static const u8 ecc_strength_mt7986[] = {
> > > > +	4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24
> > > > +};
> > > > +
> > > >    enum mtk_ecc_regs {
> > > >    	ECC_ENCPAR00,
> > > >    	ECC_ENCIRQ_EN,
> > > > @@ -483,6 +487,17 @@ static const struct mtk_ecc_caps
> > > > mtk_ecc_caps_mt7622 = {
> > > >    	.pg_irq_sel = 0,
> > > >    };
> > > >    
> > > > +static const struct mtk_ecc_caps mtk_ecc_caps_mt7986 = {
> > > > +	.err_mask = 0x1f,
> > > 
> > > Can't we use GENMASK() to define err_mask instead?
> > > 
> > > #define MT7986_ERRNUM	GENMASK(4, 0)
> > > 
> > > P.S.: Did I get that right? Is that referred to the ERRNUM(x)
> > > bits
> > 
> > Yes, you are right.
> > I will change like
> > #define ECC_ERRMASK(x) GENMASK(x, 0),
> > since other IC driver data will use 0x3f and 0x7f err_mask.
> > 
> 
> I would prefer, instead, something like
> 
> #define MT7986_ERRNUM	GENMASK(....)
> #define MT7622_ERRNUM	GENMASK(....)
> #define MT.... (etc)
> 
> instead of a macro calling another macro.

Will do.

Thanks
Xiangsheng Hou
diff mbox series

Patch

diff --git a/drivers/mtd/nand/ecc-mtk.c b/drivers/mtd/nand/ecc-mtk.c
index 9f9b201fe706..c2f6cfa76a04 100644
--- a/drivers/mtd/nand/ecc-mtk.c
+++ b/drivers/mtd/nand/ecc-mtk.c
@@ -79,6 +79,10 @@  static const u8 ecc_strength_mt7622[] = {
 	4, 6, 8, 10, 12
 };
 
+static const u8 ecc_strength_mt7986[] = {
+	4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24
+};
+
 enum mtk_ecc_regs {
 	ECC_ENCPAR00,
 	ECC_ENCIRQ_EN,
@@ -483,6 +487,17 @@  static const struct mtk_ecc_caps mtk_ecc_caps_mt7622 = {
 	.pg_irq_sel = 0,
 };
 
+static const struct mtk_ecc_caps mtk_ecc_caps_mt7986 = {
+	.err_mask = 0x1f,
+	.err_shift = 8,
+	.ecc_strength = ecc_strength_mt7986,
+	.ecc_regs = mt2712_ecc_regs,
+	.num_ecc_strength = 11,
+	.ecc_mode_shift = 5,
+	.parity_bits = 14,
+	.pg_irq_sel = 1,
+};
+
 static const struct of_device_id mtk_ecc_dt_match[] = {
 	{
 		.compatible = "mediatek,mt2701-ecc",
@@ -493,6 +508,9 @@  static const struct of_device_id mtk_ecc_dt_match[] = {
 	}, {
 		.compatible = "mediatek,mt7622-ecc",
 		.data = &mtk_ecc_caps_mt7622,
+	}, {
+		.compatible = "mediatek,mt7986-ecc",
+		.data = &mtk_ecc_caps_mt7986,
 	},
 	{},
 };