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Mon, 9 Jan 2023 20:45:23 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Mon, 9 Jan 2023 20:45:23 +0800 From: Garmin.Chang To: Matthias Brugger , Rob Herring , Krzysztof Kozlowski , Michael Turquette , Stephen Boyd , Richard Cochran CC: , , , , , , , Garmin.Chang Subject: [PATCH v4 19/19] clk: mediatek: Add MT8188 adsp clock support Date: Mon, 9 Jan 2023 20:45:16 +0800 Message-ID: <20230109124516.31425-20-Garmin.Chang@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230109124516.31425-1-Garmin.Chang@mediatek.com> References: <20230109124516.31425-1-Garmin.Chang@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230109_124603_711283_645888C6 X-CRM114-Status: GOOD ( 15.73 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Add MT8188 adsp clock controller which provides clock gate control for Audio DSP. Signed-off-by: Garmin.Chang --- drivers/clk/mediatek/Makefile | 2 +- .../clk/mediatek/clk-mt8188-adsp_audio26m.c | 45 +++++++++++++++++++ 2 files changed, 46 insertions(+), 1 deletion(-) create mode 100644 drivers/clk/mediatek/clk-mt8188-adsp_audio26m.c diff --git a/drivers/clk/mediatek/Makefile b/drivers/clk/mediatek/Makefile index 8befaedfdd3d..b56ae9bee1d8 100644 --- a/drivers/clk/mediatek/Makefile +++ b/drivers/clk/mediatek/Makefile @@ -89,7 +89,7 @@ obj-$(CONFIG_COMMON_CLK_MT8188) += clk-mt8188-apmixedsys.o clk-mt8188-topckgen.o clk-mt8188-ipe.o clk-mt8188-mfg.o clk-mt8188-vdec.o \ clk-mt8188-vdo0.o clk-mt8188-vdo1.o clk-mt8188-venc.o \ clk-mt8188-vpp0.o clk-mt8188-vpp1.o clk-mt8188-wpe.o \ - clk-mt8188-imp_iic_wrap.o + clk-mt8188-imp_iic_wrap.o clk-mt8188-adsp_audio26m.o obj-$(CONFIG_COMMON_CLK_MT8192) += clk-mt8192.o obj-$(CONFIG_COMMON_CLK_MT8192_AUDSYS) += clk-mt8192-aud.o obj-$(CONFIG_COMMON_CLK_MT8192_CAMSYS) += clk-mt8192-cam.o diff --git a/drivers/clk/mediatek/clk-mt8188-adsp_audio26m.c b/drivers/clk/mediatek/clk-mt8188-adsp_audio26m.c new file mode 100644 index 000000000000..f91381a1316c --- /dev/null +++ b/drivers/clk/mediatek/clk-mt8188-adsp_audio26m.c @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: GPL-2.0-only +// +// Copyright (c) 2022 MediaTek Inc. +// Author: Garmin Chang + +#include +#include +#include + +#include "clk-gate.h" +#include "clk-mtk.h" + +static const struct mtk_gate_regs adsp_audio26m_cg_regs = { + .set_ofs = 0x80, + .clr_ofs = 0x80, + .sta_ofs = 0x80, +}; + +#define GATE_ADSP_FLAGS(_id, _name, _parent, _shift) \ + GATE_MTK_FLAGS(_id, _name, _parent, &adsp_audio26m_cg_regs, _shift, \ + &mtk_clk_gate_ops_no_setclr, CLK_IGNORE_UNUSED) + +static const struct mtk_gate adsp_audio26m_clks[] = { + GATE_ADSP_FLAGS(CLK_AUDIODSP_AUDIO26M, "audiodsp_audio26m", "clk26m", 3), +}; + +static const struct mtk_clk_desc adsp_audio26m_desc = { + .clks = adsp_audio26m_clks, + .num_clks = ARRAY_SIZE(adsp_audio26m_clks), +}; + +static const struct of_device_id of_match_clk_mt8188_adsp_audio26m[] = { + { .compatible = "mediatek,mt8188-adsp-audio26m", .data = &adsp_audio26m_desc }, + { /* sentinel */ } +}; + +static struct platform_driver clk_mt8188_adsp_audio26m_drv = { + .probe = mtk_clk_simple_probe, + .remove = mtk_clk_simple_remove, + .driver = { + .name = "clk-mt8188-adsp_audio26m", + .of_match_table = of_match_clk_mt8188_adsp_audio26m, + }, +}; +builtin_platform_driver(clk_mt8188_adsp_audio26m_drv);