Message ID | 20230203-evk-board-support-v4-4-5cffe66a38c0@baylibre.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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[93.5.22.158]) by smtp.googlemail.com with ESMTPSA id 1-20020a05600c22c100b003eeb1d6a470sm3370171wmg.13.2023.03.31.10.55.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 31 Mar 2023 10:55:37 -0700 (PDT) From: Alexandre Mergnat <amergnat@baylibre.com> Date: Fri, 31 Mar 2023 19:54:48 +0200 Subject: [PATCH v4 04/11] arm64: dts: mediatek: add mt6357 PMIC support for mt8365-evk MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20230203-evk-board-support-v4-4-5cffe66a38c0@baylibre.com> References: <20230203-evk-board-support-v4-0-5cffe66a38c0@baylibre.com> In-Reply-To: <20230203-evk-board-support-v4-0-5cffe66a38c0@baylibre.com> To: Wim Van Sebroeck <wim@linux-watchdog.org>, Guenter Roeck <linux@roeck-us.net>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Matthias Brugger <matthias.bgg@gmail.com>, AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>, Chaotian Jing <chaotian.jing@mediatek.com>, Ulf Hansson <ulf.hansson@linaro.org>, Wenbin Mei <wenbin.mei@mediatek.com>, Linus Walleij <linus.walleij@linaro.org>, Zhiyong Tao <zhiyong.tao@mediatek.com>, =?utf-8?q?Bernhard_Rosenkr=C3=A4nz?= =?utf-8?q?er?= <bero@baylibre.com> Cc: linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-mmc@vger.kernel.org, linux-gpio@vger.kernel.org, Alexandre Bailon <abailon@baylibre.com>, Fabien Parent <fparent@baylibre.com>, Amjad Ouled-Ameur <aouledameur@baylibre.com>, Alexandre Mergnat <amergnat@baylibre.com> X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=962; i=amergnat@baylibre.com; h=from:subject:message-id; bh=O8w7thwfT5MR8VFkiJw3MJIje+8Rl/nHai1vgZPIVV8=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBkJx6UgiVTVhzknxnURoOGVCKLYcU2dVLkzXoobrjj VsxXt6KJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZCcelAAKCRArRkmdfjHURZ7TD/ 9iTLIVvSg7owqsUoDceY6ndNYIT8HmsApucX9g14JcswuQ+UyI2U0SjNL+HOGzgO0sBVVeH5q3keTm D5e56FbmFfLnWkp7O4gQblNL/OqU3sIOkAG+szu8f1CNMJfEsXALVsNW83tJry9o3z6CaZMkylI8F5 4pw78JcX80XNZDuHIwV/4QBBeU8Q+94J8JyUHiKwWLfEFcUnEscztsNjYX/4Izbntad3gDhy+c5ylM ySWsj5nmft58+ZjEY15bBTXt8WQBFQ8PHppGAbzkF7A5J+BMQaRn8+Y7PoOM+Vp/qhxGh70bqyG8QK 6Z1cZs7fMVnIcPRGr9US0LYCL+fstARA/nVSzqiTcomu+KgRtNBHLnMbEagczKheJWnBk6XcizkVH8 TE6b1Dq0SWWxi2S5MP+6j6vCnxqBl5xv3yBjth8lAC8loJhfsx5XecsTKK2+lqDyYV5FgQQW2etCsh HnbSTTGu/M4369PL4LcPnTyT7zfKku2BU0V8BQuRkawr6Ok5l4Voaq/XqYaN1qmsK+YM3DJL36pJMO 0sQGlAOYZtDxpykIbt5VeTc3ZzRJOnWC8D5ykWkpwuO5Q+ljjjBa2dKsBnaMVEdPBc5hgFXc1Lq658 lc7R3F9XE4bne9GzejjbaitCyTPIQyxVq3okUnExQdjPgBv88cFFuI2Pv3HQ== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230331_105542_499116_E15D4690 X-CRM114-Status: UNSURE ( 9.77 ) X-CRM114-Notice: Please train this message. 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Series |
Improve the MT8365 SoC and EVK board support
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expand
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diff --git a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts index dd7da86420cf..a238bd0092d2 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts +++ b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts @@ -12,6 +12,7 @@ #include <dt-bindings/input/input.h> #include <dt-bindings/pinctrl/mt8365-pinfunc.h> #include "mt8365.dtsi" +#include "mt6357.dtsi" / { model = "MediaTek MT8365 Open Platform EVK"; @@ -94,6 +95,12 @@ &i2c0 { status = "okay"; }; +&mt6357_pmic { + interrupts-extended = <&pio 145 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <2>; +}; + &pio { gpio_keys: gpio-keys-pins { pins {
This power management system chip integration helps to manage regulators and keys. Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com> --- arch/arm64/boot/dts/mediatek/mt8365-evk.dts | 7 +++++++ 1 file changed, 7 insertions(+)