Message ID | 20230206091109.1324-3-moudy.ho@mediatek.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | add support for MT8195 VPPSYS on MMSYS and MUTEX | expand |
On Mon, Feb 6, 2023 at 5:11 PM Moudy Ho <moudy.ho@mediatek.com> wrote: > > From: "Roy-CW.Yeh" <roy-cw.yeh@mediatek.com> > > With the change of the MMSYS binding file for MT8195, the compatible > name of VPPSYS in dts need to be fixed to match the definition. > > Signed-off-by: Roy-CW.Yeh <roy-cw.yeh@mediatek.com> > Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Tested-by: Chen-Yu Tsai <wenst@chromium.org>
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi index 8f1264d5290b..526136703142 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -1795,8 +1795,8 @@ #clock-cells = <1>; }; - vppsys0: clock-controller@14000000 { - compatible = "mediatek,mt8195-vppsys0"; + vppsys0: syscon@14000000 { + compatible = "mediatek,mt8195-vppsys0", "syscon"; reg = <0 0x14000000 0 0x1000>; #clock-cells = <1>; }; @@ -1900,8 +1900,8 @@ power-domains = <&spm MT8195_POWER_DOMAIN_WPESYS>; }; - vppsys1: clock-controller@14f00000 { - compatible = "mediatek,mt8195-vppsys1"; + vppsys1: syscon@14f00000 { + compatible = "mediatek,mt8195-vppsys1", "syscon"; reg = <0 0x14f00000 0 0x1000>; #clock-cells = <1>; };