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[90.63.244.31]) by smtp.googlemail.com with ESMTPSA id o13-20020a5d670d000000b002c8476dde7asm12657607wru.114.2023.03.07.05.46.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Mar 2023 05:46:39 -0800 (PST) From: Alexandre Mergnat Date: Tue, 07 Mar 2023 14:46:29 +0100 Subject: [PATCH 4/6] arm64: dts: mediatek: add smi support for mt8365 SoC MIME-Version: 1.0 Message-Id: <20230207-iommu-support-v1-4-4f0c81fd52c1@baylibre.com> References: <20230207-iommu-support-v1-0-4f0c81fd52c1@baylibre.com> In-Reply-To: <20230207-iommu-support-v1-0-4f0c81fd52c1@baylibre.com> To: Krzysztof Kozlowski , Rob Herring , Matthias Brugger , Yong Wu , Krzysztof Kozlowski , AngeloGioacchino Del Regno Cc: linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, Alexandre Mergnat , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=2234; i=amergnat@baylibre.com; h=from:subject:message-id; bh=8Utuzf8vnkkr4HLSj6tVwRat45+MSGUxWim3O+x8mr0=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBkB0A7ZT3peawJygVrc7zIOmQK2eu2/NkUJKAXx44O NcT7aE2JAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZAdAOwAKCRArRkmdfjHUReLVD/ 4lojGGLFnZrYGkcB0rp+6wSSgVkNlIDEaTmRBtCB08m417n1STAtRI3sET3VknYAqzm2C+8BVxWTd+ o6eWt09OTxUMAT/mxZ+29GbNkzqOZKv8EVjbAnFnCWln2+nodvXZDsE1VOUnj/ll0OqNtK2D8wB0TU Z6DSNZy3VvraHoly8gz96u+CW0ZP3ImikyFWWJB9kB5kkGZ1xORMMKeMsC0tQgj2Itu0gbmk6QO+n9 enmIm55j4rdDWIkrRNrjmdrtClXq0W9BoTvPLkeX7anmciBdhBpzG91V20N0fpwIkwEESGZn/apQ0V tnyVVVDXlaFfV87ynZlS5Zvv+0v8f0VwsN1w79IS5zrYvPD0WAg+l8miSCDfrnfOrTCG5FzzhctCjh kC44gf5kRimqk/TK078eJUVjuJAADC94j6A8/ZgzZpXu8NPpWrik6ERWcKaYwPRCRJXEYdITIuKmqB QBS6Nhlt6K+yBEluIqcwJC73Q3un6DfY9FgyQG6VRTTkMUi8wY+m6Ahx4INcEq/5YmJzGBjD3xi/xi A5N93wRyiCGoe9VKJKRrg/qyYi7MELFU/M4N3aprDR8hzqGEZguetV9IasqmOEjGkvYE2j8pgTBVfC y7EINJuyoh4sKZKMXU9SisziJTeRpDxAZSqIoL8jTy956zaGRaZBh+NdhJCg== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230307_054643_570199_F7626BF7 X-CRM114-Status: GOOD ( 10.48 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Smart Multimedia Interface (SMI) local arbiter does the arbitration for memory requests from multi-media engines. Add SMI in the MT8365 DTS will allow to add local ARBiter (LARB), use by IOMMU. Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt8365.dtsi | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi index 67b375fe2020..61333800ff4a 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -324,16 +324,19 @@ power-domain@MT8365_POWER_DOMAIN_CAM { "cam-4", "cam-5"; #power-domain-cells = <0>; mediatek,infracfg = <&infracfg>; + mediatek,smi = <&smi_common>; }; power-domain@MT8365_POWER_DOMAIN_VDEC { reg = ; #power-domain-cells = <0>; + mediatek,smi = <&smi_common>; }; power-domain@MT8365_POWER_DOMAIN_VENC { reg = ; #power-domain-cells = <0>; + mediatek,smi = <&smi_common>; }; power-domain@MT8365_POWER_DOMAIN_APU { @@ -351,6 +354,7 @@ power-domain@MT8365_POWER_DOMAIN_APU { "apu-5"; #power-domain-cells = <0>; mediatek,infracfg = <&infracfg>; + mediatek,smi = <&smi_common>; }; }; @@ -709,6 +713,18 @@ mmsys: syscon@14000000 { #clock-cells = <1>; }; + smi_common: smi@14002000 { + compatible = "mediatek,mt8365-smi-common", + "mediatek,mt8186-smi-common"; + reg = <0 0x14002000 0 0x1000>; + clocks = <&mmsys CLK_MM_MM_SMI_COMMON>, + <&mmsys CLK_MM_MM_SMI_COMMON>, + <&mmsys CLK_MM_MM_SMI_COMM0>, + <&mmsys CLK_MM_MM_SMI_COMM1>; + clock-names = "apb", "smi", "gals0", "gals1"; + power-domains = <&spm MT8365_POWER_DOMAIN_MM>; + }; + camsys: syscon@15000000 { compatible = "mediatek,mt8365-imgsys", "syscon"; reg = <0 0x15000000 0 0x1000>; @@ -720,7 +736,6 @@ apu: syscon@19020000 { reg = <0 0x19020000 0 0x1000>; #clock-cells = <1>; }; - }; timer {