| Message ID | 20230207130958.608305-3-bchihi@baylibre.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add LVTS Thermal Architecture | expand |
On 07/02/2023 14:09, bchihi@baylibre.com wrote: > From: Balsam CHIHI <bchihi@baylibre.com> > > Add LVTS thermal controllers dt-binding definition for mt8192 and mt8195. > > +allOf: > + - $ref: thermal-sensor.yaml# > + > + - if: > + properties: > + compatible: > + contains: > + enum: > + - mediatek,mt8192-lvts-ap > + - mediatek,mt8192-lvts-mcu > + then: > + properties: > + nvmem-cells: > + maxItems: 1 > + > + nvmem-cell-names: > + maxItems: 1 > + > + - if: > + properties: > + compatible: > + contains: > + enum: > + - mediatek,mt8195-lvts-ap > + - mediatek,mt8195-lvts-mcu > + then: > + properties: > + nvmem-cells: minItems: 2 > + maxItems: 2 > + > + nvmem-cell-names: minItems: 2 > + maxItems: 2 > + > +required: > + - compatible > + - reg > + - interrupts (...) > diff --git a/include/dt-bindings/thermal/mediatek,lvts-thermal.h b/include/dt-bindings/thermal/mediatek,lvts-thermal.h > new file mode 100644 > index 000000000000..4f2082065a31 > --- /dev/null > +++ b/include/dt-bindings/thermal/mediatek,lvts-thermal.h > @@ -0,0 +1,19 @@ > +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ > +/* > + * Copyright (c) 2023 MediaTek Inc. > + * Author: Balsam CHIHI <bchihi@baylibre.com> > + */ > + > +#ifndef __MEDIATEK_LVTS_DT_H > +#define __MEDIATEK_LVTS_DT_H > + > +#define MT8195_MCU_BIG_CPU0 0 > +#define MT8195_MCU_BIG_CPU1 1 > +#define MT8195_MCU_BIG_CPU2 2 > +#define MT8195_MCU_BIG_CPU3 3 > +#define MT8195_MCU_LITTLE_CPU0 4 These changed for some reason. Why? The indentation is now broken (although not visible above quote, but visible in diff and code). Best regards, Krzysztof
Hi Krzysztof, Thank you for the review. On Tue, Feb 7, 2023 at 2:35 PM Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > > On 07/02/2023 14:09, bchihi@baylibre.com wrote: > > From: Balsam CHIHI <bchihi@baylibre.com> > > > > Add LVTS thermal controllers dt-binding definition for mt8192 and mt8195. > > > > > > +allOf: > > + - $ref: thermal-sensor.yaml# > > + > > + - if: > > + properties: > > + compatible: > > + contains: > > + enum: > > + - mediatek,mt8192-lvts-ap > > + - mediatek,mt8192-lvts-mcu > > + then: > > + properties: > > + nvmem-cells: > > + maxItems: 1 > > + > > + nvmem-cell-names: > > + maxItems: 1 > > + > > + - if: > > + properties: > > + compatible: > > + contains: > > + enum: > > + - mediatek,mt8195-lvts-ap > > + - mediatek,mt8195-lvts-mcu > > + then: > > + properties: > > + nvmem-cells: > > minItems: 2 > OK, I will do the change. > > + maxItems: 2 > > + > > + nvmem-cell-names: > > minItems: 2 > OK, I will do this change too. > > + maxItems: 2 > > + > > +required: > > + - compatible > > + - reg > > + - interrupts > > (...) > > > diff --git a/include/dt-bindings/thermal/mediatek,lvts-thermal.h b/include/dt-bindings/thermal/mediatek,lvts-thermal.h > > new file mode 100644 > > index 000000000000..4f2082065a31 > > --- /dev/null > > +++ b/include/dt-bindings/thermal/mediatek,lvts-thermal.h > > @@ -0,0 +1,19 @@ > > +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ > > +/* > > + * Copyright (c) 2023 MediaTek Inc. > > + * Author: Balsam CHIHI <bchihi@baylibre.com> > > + */ > > + > > +#ifndef __MEDIATEK_LVTS_DT_H > > +#define __MEDIATEK_LVTS_DT_H > > + > > +#define MT8195_MCU_BIG_CPU0 0 > > +#define MT8195_MCU_BIG_CPU1 1 > > +#define MT8195_MCU_BIG_CPU2 2 > > +#define MT8195_MCU_BIG_CPU3 3 > > +#define MT8195_MCU_LITTLE_CPU0 4 > > These changed for some reason. Why? The indentation is now broken > (although not visible above quote, but visible in diff and code). I thought that I fixed the indentation. I will restore it. > > Best regards, > Krzysztof > Best regards, Balsam
diff --git a/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml new file mode 100644 index 000000000000..3265d480749b --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml @@ -0,0 +1,142 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/mediatek,lvts-thermal.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek SoC Low Voltage Thermal Sensor (LVTS) + +maintainers: + - Balsam CHIHI <bchihi@baylibre.com> + +description: | + LVTS is a thermal management architecture composed of three subsystems, + a Sensing device - Thermal Sensing Micro Circuit Unit (TSMCU), + a Converter - Low Voltage Thermal Sensor converter (LVTS), and + a Digital controller (LVTS_CTRL). + +properties: + compatible: + enum: + - mediatek,mt8192-lvts-ap + - mediatek,mt8192-lvts-mcu + - mediatek,mt8195-lvts-ap + - mediatek,mt8195-lvts-mcu + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + resets: + maxItems: 1 + description: LVTS reset for clearing temporary data on AP/MCU. + + nvmem-cells: + minItems: 1 + items: + - description: Calibration eFuse data 1 for LVTS + - description: Calibration eFuse data 2 for LVTS + + nvmem-cell-names: + minItems: 1 + items: + - const: lvts-calib-data-1 + - const: lvts-calib-data-2 + + "#thermal-sensor-cells": + const: 1 + +allOf: + - $ref: thermal-sensor.yaml# + + - if: + properties: + compatible: + contains: + enum: + - mediatek,mt8192-lvts-ap + - mediatek,mt8192-lvts-mcu + then: + properties: + nvmem-cells: + maxItems: 1 + + nvmem-cell-names: + maxItems: 1 + + - if: + properties: + compatible: + contains: + enum: + - mediatek,mt8195-lvts-ap + - mediatek,mt8195-lvts-mcu + then: + properties: + nvmem-cells: + maxItems: 2 + + nvmem-cell-names: + maxItems: 2 + +required: + - compatible + - reg + - interrupts + - clocks + - resets + - nvmem-cells + - nvmem-cell-names + - "#thermal-sensor-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/mt8195-clk.h> + #include <dt-bindings/reset/mt8195-resets.h> + #include <dt-bindings/thermal/mediatek,lvts-thermal.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + lvts_mcu: thermal-sensor@11278000 { + compatible = "mediatek,mt8195-lvts-mcu"; + reg = <0 0x11278000 0 0x1000>; + interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&infracfg_ao CLK_INFRA_AO_THERM>; + resets = <&infracfg_ao MT8195_INFRA_RST4_THERM_CTRL_MCU_SWRST>; + nvmem-cells = <&lvts_efuse_data1 &lvts_efuse_data2>; + nvmem-cell-names = "lvts-calib-data-1", "lvts-calib-data-2"; + #thermal-sensor-cells = <1>; + }; + }; + + thermal_zones: thermal-zones { + cpu0-thermal { + polling-delay = <1000>; + polling-delay-passive = <250>; + thermal-sensors = <&lvts_mcu MT8195_MCU_LITTLE_CPU0>; + + trips { + cpu0_alert: trip-alert { + temperature = <85000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu0_crit: trip-crit { + temperature = <100000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + }; diff --git a/include/dt-bindings/thermal/mediatek,lvts-thermal.h b/include/dt-bindings/thermal/mediatek,lvts-thermal.h new file mode 100644 index 000000000000..4f2082065a31 --- /dev/null +++ b/include/dt-bindings/thermal/mediatek,lvts-thermal.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +/* + * Copyright (c) 2023 MediaTek Inc. + * Author: Balsam CHIHI <bchihi@baylibre.com> + */ + +#ifndef __MEDIATEK_LVTS_DT_H +#define __MEDIATEK_LVTS_DT_H + +#define MT8195_MCU_BIG_CPU0 0 +#define MT8195_MCU_BIG_CPU1 1 +#define MT8195_MCU_BIG_CPU2 2 +#define MT8195_MCU_BIG_CPU3 3 +#define MT8195_MCU_LITTLE_CPU0 4 +#define MT8195_MCU_LITTLE_CPU1 5 +#define MT8195_MCU_LITTLE_CPU2 6 +#define MT8195_MCU_LITTLE_CPU3 7 + +#endif /* __MEDIATEK_LVTS_DT_H */