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Sat, 11 Feb 2023 02:50:11 -0800 (PST) Received: from arinc9-PC.lan ([37.120.152.236]) by smtp.gmail.com with ESMTPSA id cb10-20020a0564020b6a00b004ac54d4da22sm1597911edb.71.2023.02.11.02.50.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 11 Feb 2023 02:50:10 -0800 (PST) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: Rob Herring , Krzysztof Kozlowski , Thomas Bogendoerfer , Paul Cercueil , Matthias Brugger , AngeloGioacchino Del Regno , Sergio Paracuellos , Florian Fainelli Cc: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, erkin.bozoglu@xeront.com Subject: [PATCH 2/2] mips: dts: ralink: mt7621: add port@5 as CPU port Date: Sat, 11 Feb 2023 13:49:15 +0300 Message-Id: <20230211104915.116253-2-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230211104915.116253-1-arinc.unal@arinc9.com> References: <20230211104915.116253-1-arinc.unal@arinc9.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230211_025013_078051_2330CE25 X-CRM114-Status: GOOD ( 11.61 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org From: Arınç ÜNAL On MT7621AT, MT7621DAT, and MT7621ST SoCs, port 5 of the MT7530 switch is connected to the second MAC of the SoC as a CPU port. Add the port and set up the second MAC on the bindings. Revert PHY muxing on GB-PC1. There's an external PHY connected to the second MAC of the SoC on GB-PC2, therefore, disable port@5 for this device. Signed-off-by: Arınç ÜNAL Acked-by: Sergio Paracuellos --- .../boot/dts/ralink/mt7621-gnubee-gb-pc1.dts | 16 +++++----------- .../boot/dts/ralink/mt7621-gnubee-gb-pc2.dts | 9 ++++++++- arch/mips/boot/dts/ralink/mt7621.dtsi | 19 ++++++++++++++++++- 3 files changed, 31 insertions(+), 13 deletions(-) diff --git a/arch/mips/boot/dts/ralink/mt7621-gnubee-gb-pc1.dts b/arch/mips/boot/dts/ralink/mt7621-gnubee-gb-pc1.dts index 4314aee97e18..129b6710b699 100644 --- a/arch/mips/boot/dts/ralink/mt7621-gnubee-gb-pc1.dts +++ b/arch/mips/boot/dts/ralink/mt7621-gnubee-gb-pc1.dts @@ -91,22 +91,16 @@ &pcie { status = "okay"; }; -&gmac1 { - status = "okay"; - phy-handle = <ðphy4>; -}; - -&mdio { - ethphy4: ethernet-phy@4 { - reg = <4>; - }; -}; - &switch0 { ports { port@0 { status = "okay"; label = "ethblack"; }; + + port@4 { + status = "okay"; + label = "ethblue"; + }; }; }; diff --git a/arch/mips/boot/dts/ralink/mt7621-gnubee-gb-pc2.dts b/arch/mips/boot/dts/ralink/mt7621-gnubee-gb-pc2.dts index 3ebbf933f644..f810cd10f4f4 100644 --- a/arch/mips/boot/dts/ralink/mt7621-gnubee-gb-pc2.dts +++ b/arch/mips/boot/dts/ralink/mt7621-gnubee-gb-pc2.dts @@ -112,9 +112,12 @@ &pcie { }; &gmac1 { - status = "okay"; phy-mode = "rgmii-rxid"; phy-handle = <ðphy5>; + + fixed-link { + status = "disabled"; + }; }; &mdio { @@ -134,5 +137,9 @@ port@4 { status = "okay"; label = "ethblue"; }; + + port@5 { + status = "disabled"; + }; }; }; diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi index aec85c779359..290d47fbcfbb 100644 --- a/arch/mips/boot/dts/ralink/mt7621.dtsi +++ b/arch/mips/boot/dts/ralink/mt7621.dtsi @@ -332,8 +332,13 @@ fixed-link { gmac1: mac@1 { compatible = "mediatek,eth-mac"; reg = <1>; - status = "disabled"; phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + }; }; mdio: mdio-bus { @@ -384,6 +389,18 @@ port@4 { label = "swp4"; }; + port@5 { + reg = <5>; + ethernet = <&gmac1>; + phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + }; + }; + port@6 { reg = <6>; ethernet = <&gmac0>;