| Message ID | 20230214031114.926-4-yong.wu@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Adjust the dma-ranges for MTK IOMMU | expand |
Il 14/02/23 04:11, Yong Wu ha scritto: > No functional change. Just add more comment about the current region/bank > in the code. > > Signed-off-by: Yong Wu <yong.wu@mediatek.com> > --- > drivers/iommu/mtk_iommu.c | 31 ++++++++++++++++++++++++++----- > 1 file changed, 26 insertions(+), 5 deletions(-) > > diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c > index d5a4955910ff..ab53edcb221f 100644 > --- a/drivers/iommu/mtk_iommu.c > +++ b/drivers/iommu/mtk_iommu.c > @@ -197,12 +197,33 @@ struct mtk_iommu_plat_data { > > char *pericfg_comp_str; > struct list_head *hw_list; > - unsigned int iova_region_nr; > - const struct mtk_iommu_iova_region *iova_region; > > - u8 banks_num; > - bool banks_enable[MTK_IOMMU_BANK_MAX]; > - unsigned int banks_portmsk[MTK_IOMMU_BANK_MAX]; > + /* > + * The IOMMU HW may support 16GB iova. In order to balance the IOVA ranges, > + * different masters will be put in different iova ranges, for example vcodec > + * is in 4G-8G and cam is in 8G-12G. Meanwhile, some masters may have the > + * special IOVA range requirement, like CCU can only support the address > + * 0x40000000-0x44000000. > + * Here list the iova ranges this SoC supports and which larbs/ports are in > + * which region. > + * > + * 16GB iova all use one pgtable, but each a region is a iommu group. > + */ > + struct { > + unsigned int iova_region_nr; > + const struct mtk_iommu_iova_region *iova_region; > + }; > + > + /* > + * The IOMMU HW may have 5 banks. Each bank has a indenpendent pgtable. You got a typo here: `inde*n*pendent` - after fixing that: Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c index d5a4955910ff..ab53edcb221f 100644 --- a/drivers/iommu/mtk_iommu.c +++ b/drivers/iommu/mtk_iommu.c @@ -197,12 +197,33 @@ struct mtk_iommu_plat_data { char *pericfg_comp_str; struct list_head *hw_list; - unsigned int iova_region_nr; - const struct mtk_iommu_iova_region *iova_region; - u8 banks_num; - bool banks_enable[MTK_IOMMU_BANK_MAX]; - unsigned int banks_portmsk[MTK_IOMMU_BANK_MAX]; + /* + * The IOMMU HW may support 16GB iova. In order to balance the IOVA ranges, + * different masters will be put in different iova ranges, for example vcodec + * is in 4G-8G and cam is in 8G-12G. Meanwhile, some masters may have the + * special IOVA range requirement, like CCU can only support the address + * 0x40000000-0x44000000. + * Here list the iova ranges this SoC supports and which larbs/ports are in + * which region. + * + * 16GB iova all use one pgtable, but each a region is a iommu group. + */ + struct { + unsigned int iova_region_nr; + const struct mtk_iommu_iova_region *iova_region; + }; + + /* + * The IOMMU HW may have 5 banks. Each bank has a indenpendent pgtable. + * Here list how many banks this SoC supports/enables and which ports are in which bank. + */ + struct { + u8 banks_num; + bool banks_enable[MTK_IOMMU_BANK_MAX]; + unsigned int banks_portmsk[MTK_IOMMU_BANK_MAX]; + }; + unsigned char larbid_remap[MTK_LARB_COM_MAX][MTK_LARB_SUBCOM_MAX]; };
No functional change. Just add more comment about the current region/bank in the code. Signed-off-by: Yong Wu <yong.wu@mediatek.com> --- drivers/iommu/mtk_iommu.c | 31 ++++++++++++++++++++++++++----- 1 file changed, 26 insertions(+), 5 deletions(-)