Message ID | 20230214134127.59273-30-angelogioacchino.delregno@collabora.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | MediaTek clocks: full module build and cleanups | expand |
On Tue, Feb 14, 2023 at 9:42 PM AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> wrote: > > Propagate struct device for divider clocks registered through clk-mtk > helpers to be able to get runtime PM support for MTK clocks. Sidenote: I think we still need to call pm_runtime_enable() (or some other function) on the underlying device before any clk_hw_register() calls are made for the clk core to pick up runtime PM support? > Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Il 17/02/23 05:09, Chen-Yu Tsai ha scritto: > On Tue, Feb 14, 2023 at 9:42 PM AngeloGioacchino Del Regno > <angelogioacchino.delregno@collabora.com> wrote: >> >> Propagate struct device for divider clocks registered through clk-mtk >> helpers to be able to get runtime PM support for MTK clocks. > > Sidenote: I think we still need to call pm_runtime_enable() (or some other > function) on the underlying device before any clk_hw_register() calls are > made for the clk core to pick up runtime PM support? > The clk_core checks... if (dev && pm_runtime_enabled(dev)) core->rpm_enabled = true; ...at __clk_register() time, and there's no way to enable it *later*, which is something that may or may not be good for us. We could call pm_runtime_enable() on the clock driver itself (so, in simple_probe) but that's something I didn't want to do right now because this needs a rather big amount of testing on multiple SoCs. But yes I agree with you on that we still need to *flip the switch* to actually enable rpm support. These commits are meant to make us able to do that in one line, instead of one line per file :-P >> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > > Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Thanks! :-)
diff --git a/drivers/clk/mediatek/clk-mt2701.c b/drivers/clk/mediatek/clk-mt2701.c index dfe328f7a44b..e9c27b1364b6 100644 --- a/drivers/clk/mediatek/clk-mt2701.c +++ b/drivers/clk/mediatek/clk-mt2701.c @@ -681,7 +681,7 @@ static int mtk_topckgen_init(struct platform_device *pdev) ARRAY_SIZE(top_muxes), base, &mt2701_clk_lock, clk_data); - mtk_clk_register_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs), + mtk_clk_register_dividers(&pdev->dev, top_adj_divs, ARRAY_SIZE(top_adj_divs), base, &mt2701_clk_lock, clk_data); mtk_clk_register_gates(&pdev->dev, node, top_clks, diff --git a/drivers/clk/mediatek/clk-mt8167-apmixedsys.c b/drivers/clk/mediatek/clk-mt8167-apmixedsys.c index ebd90365be5f..27597fdeb6e9 100644 --- a/drivers/clk/mediatek/clk-mt8167-apmixedsys.c +++ b/drivers/clk/mediatek/clk-mt8167-apmixedsys.c @@ -109,7 +109,7 @@ static int clk_mt8167_apmixed_probe(struct platform_device *pdev) if (ret) return ret; - ret = mtk_clk_register_dividers(adj_divs, ARRAY_SIZE(adj_divs), base, + ret = mtk_clk_register_dividers(dev, adj_divs, ARRAY_SIZE(adj_divs), base, &mt8167_apmixed_clk_lock, clk_data); if (ret) goto unregister_plls; diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c index 39bd360aa0c9..7013340e116e 100644 --- a/drivers/clk/mediatek/clk-mtk.c +++ b/drivers/clk/mediatek/clk-mtk.c @@ -393,7 +393,8 @@ void mtk_clk_unregister_composites(const struct mtk_composite *mcs, int num, } EXPORT_SYMBOL_GPL(mtk_clk_unregister_composites); -int mtk_clk_register_dividers(const struct mtk_clk_divider *mcds, int num, +int mtk_clk_register_dividers(struct device *dev, + const struct mtk_clk_divider *mcds, int num, void __iomem *base, spinlock_t *lock, struct clk_hw_onecell_data *clk_data) { @@ -412,7 +413,7 @@ int mtk_clk_register_dividers(const struct mtk_clk_divider *mcds, int num, continue; } - hw = clk_hw_register_divider(NULL, mcd->name, mcd->parent_name, + hw = clk_hw_register_divider(dev, mcd->name, mcd->parent_name, mcd->flags, base + mcd->div_reg, mcd->div_shift, mcd->div_width, mcd->clk_divider_flags, lock); @@ -535,7 +536,8 @@ static int __mtk_clk_simple_probe(struct platform_device *pdev, } if (mcd->divider_clks) { - r = mtk_clk_register_dividers(mcd->divider_clks, + r = mtk_clk_register_dividers(&pdev->dev, + mcd->divider_clks, mcd->num_divider_clks, base, mcd->clk_lock, clk_data); if (r) diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h index 554aecdc1015..b7a751861fce 100644 --- a/drivers/clk/mediatek/clk-mtk.h +++ b/drivers/clk/mediatek/clk-mtk.h @@ -202,7 +202,8 @@ struct mtk_clk_divider { .div_width = _width, \ } -int mtk_clk_register_dividers(const struct mtk_clk_divider *mcds, int num, +int mtk_clk_register_dividers(struct device *dev, + const struct mtk_clk_divider *mcds, int num, void __iomem *base, spinlock_t *lock, struct clk_hw_onecell_data *clk_data); void mtk_clk_unregister_dividers(const struct mtk_clk_divider *mcds, int num,
Propagate struct device for divider clocks registered through clk-mtk helpers to be able to get runtime PM support for MTK clocks. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- drivers/clk/mediatek/clk-mt2701.c | 2 +- drivers/clk/mediatek/clk-mt8167-apmixedsys.c | 2 +- drivers/clk/mediatek/clk-mtk.c | 8 +++++--- drivers/clk/mediatek/clk-mtk.h | 3 ++- 4 files changed, 9 insertions(+), 6 deletions(-)