Message ID | 20230221081224.23017-1-yongqiang.niu@mediatek.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [v2] drm/mediatek: add dma buffer control for drm plane disable | expand |
Hi, Yongqiang: Yongqiang Niu <yongqiang.niu@mediatek.com> 於 2023年2月21日 週二 下午4:12寫道: > > dma buffer release before overlay disable, that will cause > m4u translation fault warning. > > add dma buffer control flow in mediatek driver: > get dma buffer when drm plane disable > put dma buffer when overlay really disable Add Fixes tag. > > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> > --- > drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 19 +++++++++++++++++-- > drivers/gpu/drm/mediatek/mtk_drm_plane.c | 12 ++++++++++++ > drivers/gpu/drm/mediatek/mtk_drm_plane.h | 1 + > 3 files changed, 30 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c > index 5071f1263216..ff7924d8a167 100644 > --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c > +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c > @@ -4,6 +4,7 @@ > */ > > #include <linux/clk.h> > +#include <linux/dma-buf.h> > #include <linux/dma-mapping.h> > #include <linux/mailbox_controller.h> > #include <linux/pm_runtime.h> > @@ -282,6 +283,14 @@ struct mtk_ddp_comp *mtk_drm_ddp_comp_for_plane(struct drm_crtc *crtc, > return NULL; > } > > +static void mtk_drm_dma_buf_put(struct mtk_plane_state *plane_state) > +{ > + if (plane_state && plane_state->pending.dma_buf) { > + dma_buf_put(plane_state->pending.dma_buf); > + plane_state->pending.dma_buf = NULL; > + } > +} > + > #if IS_REACHABLE(CONFIG_MTK_CMDQ) > static void ddp_cmdq_cb(struct mbox_client *cl, void *mssg) > { > @@ -306,6 +315,7 @@ static void ddp_cmdq_cb(struct mbox_client *cl, void *mssg) > plane_state = to_mtk_plane_state(plane->state); > > plane_state->pending.config = false; > + mtk_drm_dma_buf_put(plane_state); > } > mtk_crtc->pending_planes = false; > } > @@ -318,6 +328,7 @@ static void ddp_cmdq_cb(struct mbox_client *cl, void *mssg) > plane_state = to_mtk_plane_state(plane->state); > > plane_state->pending.async_config = false; > + mtk_drm_dma_buf_put(plane_state); > } > mtk_crtc->pending_async_planes = false; > } > @@ -498,8 +509,10 @@ static void mtk_crtc_ddp_config(struct drm_crtc *crtc, > mtk_ddp_comp_layer_config(comp, local_layer, > plane_state, > cmdq_handle); > - if (!cmdq_handle) > + if (!cmdq_handle) { > plane_state->pending.config = false; > + mtk_drm_dma_buf_put(plane_state); In shadow register case, it would also call into here, but it should put dma buf in irq handler. > + } > } > > if (!cmdq_handle) > @@ -523,8 +536,10 @@ static void mtk_crtc_ddp_config(struct drm_crtc *crtc, > mtk_ddp_comp_layer_config(comp, local_layer, > plane_state, > cmdq_handle); > - if (!cmdq_handle) > + if (!cmdq_handle) { > plane_state->pending.async_config = false; > + mtk_drm_dma_buf_put(plane_state); > + } > } > > if (!cmdq_handle) > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_plane.c b/drivers/gpu/drm/mediatek/mtk_drm_plane.c > index d54fbf34b000..16495a057c42 100644 > --- a/drivers/gpu/drm/mediatek/mtk_drm_plane.c > +++ b/drivers/gpu/drm/mediatek/mtk_drm_plane.c > @@ -12,6 +12,7 @@ > #include <drm/drm_framebuffer.h> > #include <drm/drm_gem_atomic_helper.h> > #include <linux/align.h> > +#include <linux/dma-buf.h> > > #include "mtk_drm_crtc.h" > #include "mtk_drm_ddp_comp.h" > @@ -280,6 +281,17 @@ static void mtk_plane_atomic_disable(struct drm_plane *plane, > struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state, > plane); > struct mtk_plane_state *mtk_plane_state = to_mtk_plane_state(new_state); > + struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state, > + plane); > + > + if (old_state && old_state->fb) { > + struct drm_gem_object *gem = old_state->fb->obj[0]; > + > + if (gem && gem->dma_buf) { > + get_dma_buf(gem->dma_buf); > + mtk_plane_state->pending.dma_buf = gem->dma_buf; Should we check old pending.dma_buf is null here or somewhere else? I would like to make sure that old dma buf is put before new dma buf need to be put. Regards, Chun-Kuang. > + } > + } > mtk_plane_state->pending.enable = false; > wmb(); /* Make sure the above parameter is set before update */ > mtk_plane_state->pending.dirty = true; > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_plane.h b/drivers/gpu/drm/mediatek/mtk_drm_plane.h > index 8f39011cdbfc..b724e56b7283 100644 > --- a/drivers/gpu/drm/mediatek/mtk_drm_plane.h > +++ b/drivers/gpu/drm/mediatek/mtk_drm_plane.h > @@ -33,6 +33,7 @@ struct mtk_plane_pending_state { > bool async_dirty; > bool async_config; > enum drm_color_encoding color_encoding; > + struct dma_buf *dma_buf; > }; > > struct mtk_plane_state { > -- > 2.25.1 >
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c index 5071f1263216..ff7924d8a167 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c @@ -4,6 +4,7 @@ */ #include <linux/clk.h> +#include <linux/dma-buf.h> #include <linux/dma-mapping.h> #include <linux/mailbox_controller.h> #include <linux/pm_runtime.h> @@ -282,6 +283,14 @@ struct mtk_ddp_comp *mtk_drm_ddp_comp_for_plane(struct drm_crtc *crtc, return NULL; } +static void mtk_drm_dma_buf_put(struct mtk_plane_state *plane_state) +{ + if (plane_state && plane_state->pending.dma_buf) { + dma_buf_put(plane_state->pending.dma_buf); + plane_state->pending.dma_buf = NULL; + } +} + #if IS_REACHABLE(CONFIG_MTK_CMDQ) static void ddp_cmdq_cb(struct mbox_client *cl, void *mssg) { @@ -306,6 +315,7 @@ static void ddp_cmdq_cb(struct mbox_client *cl, void *mssg) plane_state = to_mtk_plane_state(plane->state); plane_state->pending.config = false; + mtk_drm_dma_buf_put(plane_state); } mtk_crtc->pending_planes = false; } @@ -318,6 +328,7 @@ static void ddp_cmdq_cb(struct mbox_client *cl, void *mssg) plane_state = to_mtk_plane_state(plane->state); plane_state->pending.async_config = false; + mtk_drm_dma_buf_put(plane_state); } mtk_crtc->pending_async_planes = false; } @@ -498,8 +509,10 @@ static void mtk_crtc_ddp_config(struct drm_crtc *crtc, mtk_ddp_comp_layer_config(comp, local_layer, plane_state, cmdq_handle); - if (!cmdq_handle) + if (!cmdq_handle) { plane_state->pending.config = false; + mtk_drm_dma_buf_put(plane_state); + } } if (!cmdq_handle) @@ -523,8 +536,10 @@ static void mtk_crtc_ddp_config(struct drm_crtc *crtc, mtk_ddp_comp_layer_config(comp, local_layer, plane_state, cmdq_handle); - if (!cmdq_handle) + if (!cmdq_handle) { plane_state->pending.async_config = false; + mtk_drm_dma_buf_put(plane_state); + } } if (!cmdq_handle) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_plane.c b/drivers/gpu/drm/mediatek/mtk_drm_plane.c index d54fbf34b000..16495a057c42 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_plane.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_plane.c @@ -12,6 +12,7 @@ #include <drm/drm_framebuffer.h> #include <drm/drm_gem_atomic_helper.h> #include <linux/align.h> +#include <linux/dma-buf.h> #include "mtk_drm_crtc.h" #include "mtk_drm_ddp_comp.h" @@ -280,6 +281,17 @@ static void mtk_plane_atomic_disable(struct drm_plane *plane, struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state, plane); struct mtk_plane_state *mtk_plane_state = to_mtk_plane_state(new_state); + struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state, + plane); + + if (old_state && old_state->fb) { + struct drm_gem_object *gem = old_state->fb->obj[0]; + + if (gem && gem->dma_buf) { + get_dma_buf(gem->dma_buf); + mtk_plane_state->pending.dma_buf = gem->dma_buf; + } + } mtk_plane_state->pending.enable = false; wmb(); /* Make sure the above parameter is set before update */ mtk_plane_state->pending.dirty = true; diff --git a/drivers/gpu/drm/mediatek/mtk_drm_plane.h b/drivers/gpu/drm/mediatek/mtk_drm_plane.h index 8f39011cdbfc..b724e56b7283 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_plane.h +++ b/drivers/gpu/drm/mediatek/mtk_drm_plane.h @@ -33,6 +33,7 @@ struct mtk_plane_pending_state { bool async_dirty; bool async_config; enum drm_color_encoding color_encoding; + struct dma_buf *dma_buf; }; struct mtk_plane_state {
dma buffer release before overlay disable, that will cause m4u translation fault warning. add dma buffer control flow in mediatek driver: get dma buffer when drm plane disable put dma buffer when overlay really disable Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> --- drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 19 +++++++++++++++++-- drivers/gpu/drm/mediatek/mtk_drm_plane.c | 12 ++++++++++++ drivers/gpu/drm/mediatek/mtk_drm_plane.h | 1 + 3 files changed, 30 insertions(+), 2 deletions(-)