From patchwork Thu May 4 00:48:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 13230689 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AB6F2C7EE26 for ; Thu, 4 May 2023 00:49:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=LiXu+B8iL+bWmt9dONK1QcOxUx0R1wWreoAZkIyWpwU=; b=ED77kxIAPDyAXUOE7yuGEYXw7c XvbdDtPyNVLlm2ZviwAGa86Il/xnGPOIiDFd5F2b8XwAighkCC/LOgrfBqbOoV00gOKikWiOj/buE 54DjkyDTnvyRlVZ1cmlPmAmKnF5HIPfEohwLpdMQV5pgJB3bl4zaGYJs+j4e/y6ICeZ0MlK4oHlBS bLr1A7vhCQ587Sa+AWQtUPvhwaJqjY5OxQNZmDg6CjGiN/TZHbHzsYg8wCa0UmxPuN883rbQSu8NC sqB2/jOUqSFUus84LZJZjr7G2iFP7mFs+dPv5yAhktKkViu7+Ra1U28BCSVY/8xTZH7DKMj0BKPkW ioa9lTgw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1puN9o-006Ckn-1M; Thu, 04 May 2023 00:49:16 +0000 Received: from madras.collabora.co.uk ([2a00:1098:0:82:1000:25:2eeb:e5ab]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1puN9f-006Cf3-0a; Thu, 04 May 2023 00:49:10 +0000 Received: from notapiano.myfiosgateway.com (unknown [IPv6:2600:4041:5b1a:cd00:524d:e95d:1a9c:492a]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by madras.collabora.co.uk (Postfix) with ESMTPSA id 70741660484E; Thu, 4 May 2023 01:49:02 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1683161344; bh=u8XBXZldjo0pv5hTDvJ4RWujEWWiFgrxeXoopBw2qJ4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=m9a8FxggP8hhRCVLp6wIzFVNcqkmdoUIfr9Bvp1Ry6BcXZ/BCn7G3mm05+JrU3c4b auL7Q+cfn1fZLP98Lss+/LpIzInsDyMoXGgPDI34PGglmFuIgJhEqG538mQXirmmAt BWkoNI0kmYsT/RjyhqQAUi0WnyR440ATT5wtx4Tzt/8e4QIc39fXoHT8vFYhTJZMjV HVTPvEPxh4ivWPGEaRD002ALtrm37HrbZiqsdC+I4LGMt10bJf5fiztiTe0JGx5eI0 yo0O2ndkco5fctdiSTBSON05ULvdBL1pin6yAmeXYStf0jbHIRZxJl5CVNOn6j+xw9 4yc7M1V5d2IKw== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Daniel Lezcano Cc: kernel@collabora.com, Alexandre Mergnat , Balsam CHIHI , Chen-Yu Tsai , Alexandre Bailon , AngeloGioacchino Del Regno , =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , Amit Kucheria , Matthias Brugger , "Rafael J. Wysocki" , Zhang Rui , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-pm@vger.kernel.org Subject: [PATCH v2 2/6] thermal/drivers/mediatek/lvts_thermal: Honor sensors in immediate mode Date: Wed, 3 May 2023 20:48:48 -0400 Message-Id: <20230504004852.627049-3-nfraprado@collabora.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230504004852.627049-1-nfraprado@collabora.com> References: <20230504004852.627049-1-nfraprado@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230503_174907_498570_0700C5AB X-CRM114-Status: GOOD ( 16.18 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Each controller can be configured to operate on immediate or filtered mode. On filtered mode, the sensors are enabled by setting the corresponding bits in MONCTL0, while on immediate mode, by setting MSRCTL1. Previously, the code would set MSRCTL1 for all four sensors when configured to immediate mode, but given that the controller might not have all four sensors connected, this would cause interrupts to trigger for non-existent sensors. Fix this by handling the MSRCTL1 register analogously to the MONCTL0: only enable the sensors that were declared. Fixes: f5f633b18234 ("thermal/drivers/mediatek: Add the Low Voltage Thermal Sensor driver") Signed-off-by: NĂ­colas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- (no changes since v1) drivers/thermal/mediatek/lvts_thermal.c | 50 +++++++++++++------------ 1 file changed, 26 insertions(+), 24 deletions(-) diff --git a/drivers/thermal/mediatek/lvts_thermal.c b/drivers/thermal/mediatek/lvts_thermal.c index 2988f201633a..f7d998a45ea0 100644 --- a/drivers/thermal/mediatek/lvts_thermal.c +++ b/drivers/thermal/mediatek/lvts_thermal.c @@ -922,24 +922,6 @@ static int lvts_ctrl_configure(struct device *dev, struct lvts_ctrl *lvts_ctrl) LVTS_HW_FILTER << 3 | LVTS_HW_FILTER; writel(value, LVTS_MSRCTL0(lvts_ctrl->base)); - /* - * LVTS_MSRCTL1 : Measurement control - * - * Bits: - * - * 9: Ignore MSRCTL0 config and do immediate measurement on sensor3 - * 6: Ignore MSRCTL0 config and do immediate measurement on sensor2 - * 5: Ignore MSRCTL0 config and do immediate measurement on sensor1 - * 4: Ignore MSRCTL0 config and do immediate measurement on sensor0 - * - * That configuration will ignore the filtering and the delays - * introduced below in MONCTL1 and MONCTL2 - */ - if (lvts_ctrl->mode == LVTS_MSR_IMMEDIATE_MODE) { - value = BIT(9) | BIT(6) | BIT(5) | BIT(4); - writel(value, LVTS_MSRCTL1(lvts_ctrl->base)); - } - /* * LVTS_MONCTL1 : Period unit and group interval configuration * @@ -1004,6 +986,8 @@ static int lvts_ctrl_start(struct device *dev, struct lvts_ctrl *lvts_ctrl) struct lvts_sensor *lvts_sensors = lvts_ctrl->sensors; struct thermal_zone_device *tz; u32 sensor_map = 0; + u32 sensor_map_bits[][4] = {{BIT(4), BIT(5), BIT(6), BIT(9)}, + {BIT(0), BIT(1), BIT(2), BIT(3)}}; int i; for (i = 0; i < lvts_ctrl->num_lvts_sensor; i++) { @@ -1040,20 +1024,38 @@ static int lvts_ctrl_start(struct device *dev, struct lvts_ctrl *lvts_ctrl) * map, so we can enable the temperature monitoring in * the hardware thermal controller. */ - sensor_map |= BIT(i); + sensor_map |= sensor_map_bits[lvts_ctrl->mode][i]; } /* - * Bits: - * 9: Single point access flow - * 0-3: Enable sensing point 0-3 - * * The initialization of the thermal zones give us * which sensor point to enable. If any thermal zone * was not described in the device tree, it won't be * enabled here in the sensor map. */ - writel(sensor_map | BIT(9), LVTS_MONCTL0(lvts_ctrl->base)); + if (lvts_ctrl->mode == LVTS_MSR_IMMEDIATE_MODE) { + /* + * LVTS_MSRCTL1 : Measurement control + * + * Bits: + * + * 9: Ignore MSRCTL0 config and do immediate measurement on sensor3 + * 6: Ignore MSRCTL0 config and do immediate measurement on sensor2 + * 5: Ignore MSRCTL0 config and do immediate measurement on sensor1 + * 4: Ignore MSRCTL0 config and do immediate measurement on sensor0 + * + * That configuration will ignore the filtering and the delays + * introduced in MONCTL1 and MONCTL2 + */ + writel(sensor_map, LVTS_MSRCTL1(lvts_ctrl->base)); + } else { + /* + * Bits: + * 9: Single point access flow + * 0-3: Enable sensing point 0-3 + */ + writel(sensor_map | BIT(9), LVTS_MONCTL0(lvts_ctrl->base)); + } return 0; }