Message ID | 20230522121532.86610-16-arinc.unal@arinc9.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | net: dsa: mt7530: improve, trap BPDU & LLDP, and prefer CPU port | expand |
On Mon, May 22, 2023 at 03:15:17PM +0300, arinc9.unal@gmail.com wrote: > From: Arınç ÜNAL <arinc.unal@arinc9.com> > > This code sets the Read Data (RD) TAP value to 16 for all TRGMII control > registers. > > The for loop iterates over all the TRGMII control registers, and > mt7530_rmw() function is used to perform a read-modify-write operation on > each register's RD_TAP field to set its value to 16. > > This operation is used to tune the timing of the read data signal in > TRGMII to match the TX signal of the link partner. > > Run this if trgmii is being used. Since this code doesn't lower the > driving, there's no apparent benefit to run this if trgmii is not being > used. > > Add a comment to explain the code. > > Thanks to 趙皎宏 (Landen Chao) for pointing out what the code does. > > Tested-by: Arınç ÜNAL <arinc.unal@arinc9.com> > Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> > --- Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 744787e38ecc..f2c1aa9cf7f7 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -404,7 +404,7 @@ static void mt7530_setup_port6(struct dsa_switch *ds, phy_interface_t interface) { struct mt7530_priv *priv = ds->priv; - u32 ncpo1, ssc_delta, xtal; + u32 ncpo1, ssc_delta, i, xtal; mt7530_clear(priv, MT7530_MHWTRAP, MHWTRAP_P6_DIS); @@ -455,6 +455,11 @@ mt7530_setup_port6(struct dsa_switch *ds, phy_interface_t interface) /* Enable the MT7530 TRGMII clocks */ core_set(priv, CORE_TRGMII_GSW_CLK_CG, REG_TRGMIICK_EN); + + /* Set the Read Data TAP value of the MT7530 TRGMII */ + for (i = 0; i < NUM_TRGMII_CTRL; i++) + mt7530_rmw(priv, MT7530_TRGMII_RD(i), + RD_TAP_MASK, RD_TAP(16)); } } @@ -2209,10 +2214,6 @@ mt7530_setup(struct dsa_switch *ds) mt7530_write(priv, MT7530_TRGMII_TD_ODT(i), TD_DM_DRVP(8) | TD_DM_DRVN(8)); - for (i = 0; i < NUM_TRGMII_CTRL; i++) - mt7530_rmw(priv, MT7530_TRGMII_RD(i), - RD_TAP_MASK, RD_TAP(16)); - /* Directly access the PHY registers via C_MDC/C_MDIO. The bit that * enables modifying the hardware trap must be set for this. */