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Lin" , "Jason-JH . Lin" , "Hsiao Chien Sung" Subject: [PATCH v7 21/23] drm/mediatek: Fix underrun in VDO1 when switches off the layer Date: Fri, 6 Oct 2023 15:38:29 +0800 Message-ID: <20231006073831.10402-22-shawn.sung@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20231006073831.10402-1-shawn.sung@mediatek.com> References: <20231006073831.10402-1-shawn.sung@mediatek.com> MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--1.397400-8.000000 X-TMASE-MatchedRID: r15/GZU7YAxQlz7zzALRPqKa0xB73sAA7yWPaQc4INS0rcU5V/oSe8Ht HEmxq9+Y8G/bfvdFXyUnOAFYLaUTjVm72EsAF82QA9lly13c/gGSiza26cvwNH5h6y4KCSJcje0 jgce+svLi8zVgXoAltsYlDcGKIsCCC24oEZ6SpSmb4wHqRpnaDhEa9sDDkr22LbG6i7W98dbd1i 4KTSE2f89R4TWA696sOygFfwAQBHQ1pTQn8aCaylDADnj2lwwmQemDxUAjl6nn/SfPR3Dh3Ema3 zYT97IFAYfQIAUhBayZvmCbKVb49sZL6x5U/HridGByp+zdaDg= X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--1.397400-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: 873682982834D8809BE0F82F0A91BE21551E3F3F614D78253E6819C916A67B552000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231006_003945_568671_1155CC9A X-CRM114-Status: GOOD ( 10.47 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Do not reset Merge while using CMDQ because it doesn't wait for frame done event as CMDQ does and could lead to underrun when the layer is switching off. Fixes: aaf94f7c3ae6 ("drm/mediatek: Add display merge async reset control") Signed-off-by: Hsiao Chien Sung --- drivers/gpu/drm/mediatek/mtk_disp_merge.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_merge.c b/drivers/gpu/drm/mediatek/mtk_disp_merge.c index e525a6b9e5b0..22f768d923d5 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_merge.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_merge.c @@ -103,7 +103,7 @@ void mtk_merge_stop_cmdq(struct device *dev, struct cmdq_pkt *cmdq_pkt) mtk_ddp_write(cmdq_pkt, 0, &priv->cmdq_reg, priv->regs, DISP_REG_MERGE_CTRL); - if (priv->async_clk) + if (!cmdq_pkt && priv->async_clk) reset_control_reset(priv->reset_ctl); }