| Message ID | 20231030132523.86123-3-angelogioacchino.delregno@collabora.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | MT8195 Cherry: Assign MFG vregs for power saving | expand |
diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi index 26213100419a..9d0f3d25cb07 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -482,6 +482,10 @@ &mfg0 { domain-supply = <&mt6315_7_vbuck1>; }; +&mfg1 { + domain-supply = <&mt6359_vsram_others_ldo_reg>; +}; + &mmc0 { status = "okay"; @@ -552,7 +556,6 @@ &mt6359_vrf12_ldo_reg { /* for GPU SRAM */ &mt6359_vsram_others_ldo_reg { - regulator-always-on; regulator-min-microvolt = <750000>; regulator-max-microvolt = <750000>; }; diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi index 79934cf051b9..8136d7631166 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -538,7 +538,7 @@ mfg0: power-domain@MT8195_POWER_DOMAIN_MFG0 { #size-cells = <0>; #power-domain-cells = <1>; - power-domain@MT8195_POWER_DOMAIN_MFG1 { + mfg1: power-domain@MT8195_POWER_DOMAIN_MFG1 { reg = <MT8195_POWER_DOMAIN_MFG1>; clocks = <&apmixedsys CLK_APMIXED_MFGPLL>, <&topckgen CLK_TOP_MFG_CORE_TMP>;
Add a phandle to the MT8195_POWER_DOMAIN_MFG1 power domain and assign the GPU SRAM (vsram_others) supply to that in mt8195-cherry: this allows to keep the sram powered up while the GPU is used. This means that it's now possible to remove the regulator-always-on property from the mt6359_vsram_others_ldo_reg vreg, so that it will be switched on and off during suspend. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi | 5 ++++- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 2 +- 2 files changed, 5 insertions(+), 2 deletions(-)