| Message ID | 20231101082402.20856-1-naomi.chu@mediatek.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | [v2,1/1] ufs: core: Expand MCQ queue slot to DeviceQueueDepth + 1 | expand |
On 11/1/23 01:24, naomi.chu@mediatek.com wrote: > From: Naomi Chu <naomi.chu@mediatek.com> > > Allow UFSHCI 4.0 controllers to fully utilize MCQ queue slots. > > Signed-off-by: Naomi Chu <naomi.chu@mediatek.com> > --- > drivers/ufs/core/ufs-mcq.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/ufs/core/ufs-mcq.c b/drivers/ufs/core/ufs-mcq.c > index 2ba8ec254dce..5c75ab9d6bb5 100644 > --- a/drivers/ufs/core/ufs-mcq.c > +++ b/drivers/ufs/core/ufs-mcq.c > @@ -436,7 +436,7 @@ int ufshcd_mcq_init(struct ufs_hba *hba) > > for (i = 0; i < hba->nr_hw_queues; i++) { > hwq = &hba->uhq[i]; > - hwq->max_entries = hba->nutrs; > + hwq->max_entries = hba->nutrs + 1; > spin_lock_init(&hwq->sq_lock); > spin_lock_init(&hwq->cq_lock); > mutex_init(&hwq->sq_mutex); Please add a Fixes: tag and expand the patch description. What should be mentioned in the patch description is that the UFSHCI specification requires that there is always at least one empty slot in each completion queue. I think that is why the above change is necessary. Thanks, Bart.
diff --git a/drivers/ufs/core/ufs-mcq.c b/drivers/ufs/core/ufs-mcq.c index 2ba8ec254dce..5c75ab9d6bb5 100644 --- a/drivers/ufs/core/ufs-mcq.c +++ b/drivers/ufs/core/ufs-mcq.c @@ -436,7 +436,7 @@ int ufshcd_mcq_init(struct ufs_hba *hba) for (i = 0; i < hba->nr_hw_queues; i++) { hwq = &hba->uhq[i]; - hwq->max_entries = hba->nutrs; + hwq->max_entries = hba->nutrs + 1; spin_lock_init(&hwq->sq_lock); spin_lock_init(&hwq->cq_lock); mutex_init(&hwq->sq_mutex);