diff mbox series

[v1,2/2] dt-bindings: mmc: mtk-sd: add 64-steps tuning related property

Message ID 20231124070839.12484-3-axe.yang@mediatek.com (mailing list archive)
State New, archived
Headers show
Series mmc: mediatek: add support for complete clock cycle tuning | expand

Commit Message

Axe Yang (杨磊) Nov. 24, 2023, 7:08 a.m. UTC
Add 'mediatek,tune-64-steps' option. This property will give MSDC
a chance to achieve a more optimal calibration result, thus avoiding
potential CRC issues.

Signed-off-by: Axe Yang <axe.yang@mediatek.com>
---
 Documentation/devicetree/bindings/mmc/mtk-sd.yaml | 8 ++++++++
 1 file changed, 8 insertions(+)

Comments

Krzysztof Kozlowski Nov. 24, 2023, 8:24 a.m. UTC | #1
On 24/11/2023 08:08, Axe Yang wrote:
> Add 'mediatek,tune-64-steps' option. This property will give MSDC
> a chance to achieve a more optimal calibration result, thus avoiding
> potential CRC issues.

Documentation goes before users.

> 
> Signed-off-by: Axe Yang <axe.yang@mediatek.com>
> ---
>  Documentation/devicetree/bindings/mmc/mtk-sd.yaml | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
> index 3fffa467e4e1..c33301e2ea33 100644
> --- a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
> +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
> @@ -145,6 +145,14 @@ properties:
>      minimum: 0
>      maximum: 7
>  
> +  mediatek,tune-64-steps:
> +    $ref: /schemas/types.yaml#/definitions/flag
> +    description:
> +      Some Soc need enable 64-steps tuning for better delay value to avoid CRC issue.

This scales poorly. Instead should be enum with number of tuning steps.

> +      If present, tune 64 steps to cover a complete clock cycle.
> +      If not present, tune only 32 steps. For eMMC and SD, this can also yield
> +      satisfactory calibration results in most cases.

Best regards,
Krzysztof
Axe Yang (杨磊) Nov. 28, 2023, 7:07 a.m. UTC | #2
Hi Krzysztof,

Thank you for the comments. I uploaded patchset v2 just now, please
have a look.

Regards,
Axe

On Fri, 2023-11-24 at 09:24 +0100, Krzysztof Kozlowski wrote:
>  	 
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
>  On 24/11/2023 08:08, Axe Yang wrote:
> > Add 'mediatek,tune-64-steps' option. This property will give MSDC
> > a chance to achieve a more optimal calibration result, thus
> avoiding
> > potential CRC issues.
> 
> Documentation goes before users.

Fixed in v2.

> > 
> > Signed-off-by: Axe Yang <axe.yang@mediatek.com>
> > ---
> >  Documentation/devicetree/bindings/mmc/mtk-sd.yaml | 8 ++++++++
> >  1 file changed, 8 insertions(+)
> > 
> > diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
> b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
> > index 3fffa467e4e1..c33301e2ea33 100644
> > --- a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
> > +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
> > @@ -145,6 +145,14 @@ properties:
> >      minimum: 0
> >      maximum: 7
> >  
> > +  mediatek,tune-64-steps:
> > +    $ref: /schemas/types.yaml#/definitions/flag
> > +    description:
> > +      Some Soc need enable 64-steps tuning for better delay value
> to avoid CRC issue.
> 
> This scales poorly. Instead should be enum with number of tuning
> steps.

Fixed in v2.

> 
> > +      If present, tune 64 steps to cover a complete clock cycle.
> > +      If not present, tune only 32 steps. For eMMC and SD, this
> can also yield
> > +      satisfactory calibration results in most cases.
> 
> Best regards,
> Krzysztof
>
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
index 3fffa467e4e1..c33301e2ea33 100644
--- a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
+++ b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
@@ -145,6 +145,14 @@  properties:
     minimum: 0
     maximum: 7
 
+  mediatek,tune-64-steps:
+    $ref: /schemas/types.yaml#/definitions/flag
+    description:
+      Some Soc need enable 64-steps tuning for better delay value to avoid CRC issue.
+      If present, tune 64 steps to cover a complete clock cycle.
+      If not present, tune only 32 steps. For eMMC and SD, this can also yield
+      satisfactory calibration results in most cases.
+
   resets:
     maxItems: 1