diff mbox series

[07/14] mips: dts: ralink: mt7621: reorder spi0 node attributes

Message ID 20240316045442.31469-8-justin.swartz@risingedge.co.za (mailing list archive)
State New
Headers show
Series mips: dts: ralink: mt7621: improve DTS style | expand

Commit Message

Justin Swartz March 16, 2024, 4:54 a.m. UTC
Reorder the attributes of the SPI controller node so that
they're aligned with the DTS style guide.

Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za>
---
 arch/mips/boot/dts/ralink/mt7621.dtsi | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

--

Comments

Arınç ÜNAL March 16, 2024, 9:22 a.m. UTC | #1
On 16.03.2024 07:54, Justin Swartz wrote:
> Reorder the attributes of the SPI controller node so that
> they're aligned with the DTS style guide.
> 
> Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za>

Reviewed-by: Arınç ÜNAL <arinc.unal@arinc9.com>

Arınç
AngeloGioacchino Del Regno March 18, 2024, 10:20 a.m. UTC | #2
Il 16/03/24 05:54, Justin Swartz ha scritto:
> Reorder the attributes of the SPI controller node so that
> they're aligned with the DTS style guide.
> 
> Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za>

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
diff mbox series

Patch

diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi
index 87a3bcbc0..60dfbae53 100644
--- a/arch/mips/boot/dts/ralink/mt7621.dtsi
+++ b/arch/mips/boot/dts/ralink/mt7621.dtsi
@@ -183,22 +183,22 @@  serial2: serial@e00 {
 		};
 
 		spi0: spi@b00 {
-			status = "disabled";
-
 			compatible = "ralink,mt7621-spi";
 			reg = <0xb00 0x100>;
 
-			clocks = <&sysc MT7621_CLK_SPI>;
-			clock-names = "spi";
-
-			resets = <&sysc MT7621_RST_SPI>;
-			reset-names = "spi";
-
 			#address-cells = <1>;
 			#size-cells = <0>;
 
+			clock-names = "spi";
+			clocks = <&sysc MT7621_CLK_SPI>;
+
 			pinctrl-names = "default";
 			pinctrl-0 = <&spi_pins>;
+
+			reset-names = "spi";
+			resets = <&sysc MT7621_RST_SPI>;
+
+			status = "disabled";
 		};
 	};