arm64: dts: mediatek: mt7981: fix code alignment for PWM clocks

Commit Message

Rafał Miłecki April 5, 2024, 10:50 a.m. UTC

From: Rafał Miłecki <[e-mail]>

Align "clocks" array entries to start at the same column.

Fixes: cf29427573cc ("arm64: dts: mediatek: Add initial MT7981B and Xiaomi AX3000T")
Signed-off-by: Rafał Miłecki <[e-mail]>
---
 arch/arm64/boot/dts/mediatek/mt7981b.dtsi | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

Comments

AngeloGioacchino Del Regno June 3, 2024, 7:38 a.m. UTC | #1

On Fri, 05 Apr 2024 12:50:30 +0200, Rafał Miłecki wrote:
> Align "clocks" array entries to start at the same column.
> 
> 

Applied to v6.10-next/dts64, thanks!

[1/1] arm64: dts: mediatek: mt7981: fix code alignment for PWM clocks
      commit: 8e062a6ccab30ee3775efe5c291d61ed7786b761

Cheers,
Angelo

Patch

diff --git a/arch/arm64/boot/dts/mediatek/mt7981b.dtsi b/arch/arm64/boot/dts/mediatek/mt7981b.dtsi
index 5674ac81d1f8..8a6263cc569c 100644
--- a/arch/arm64/boot/dts/mediatek/mt7981b.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7981b.dtsi
@@ -86,10 +86,10 @@  pwm@10048000 {
 			compatible = "mediatek,mt7981-pwm";
 			reg = <0 0x10048000 0 0x1000>;
 			clocks = <&infracfg CLK_INFRA_PWM_STA>,
-				<&infracfg CLK_INFRA_PWM_HCK>,
-				<&infracfg CLK_INFRA_PWM1_CK>,
-				<&infracfg CLK_INFRA_PWM2_CK>,
-				<&infracfg CLK_INFRA_PWM3_CK>;
+				 <&infracfg CLK_INFRA_PWM_HCK>,
+				 <&infracfg CLK_INFRA_PWM1_CK>,
+				 <&infracfg CLK_INFRA_PWM2_CK>,
+				 <&infracfg CLK_INFRA_PWM3_CK>;
 			clock-names = "top", "main", "pwm1", "pwm2", "pwm3";
 			#pwm-cells = <2>;
 		};