From patchwork Thu May 2 10:38:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Sung X-Patchwork-Id: 13651543 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DE2AEC25B5C for ; Thu, 2 May 2024 10:39:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=YAkA0qWm0WibdgBc9DJ/ka2v14fCDYp1Wudifm+WvOw=; b=BB52U05jTlwPPpkpMDjWVGmg4z Q5HDVDvXUdIMQHHKt24BkwcJdhNeEFbHyu7eB2p+AnVYo32GNKdb1KFjDPhvP3NPTPclher+wXhGs h7bBNlXIAnLpEnUsTMMkhWPZxNbyg8yoIBBChZeA21VmtlMY4JcRFguep6nvdNvXcx179yNRTusqs B7P/3NrZRFJtvQR0ABtCL3MWX/yJhSThO0TwXucQhSWMMbYopNBMv8le6GyC36lR0bVbh4uq17jJ5 di0j3kzKADeb1TY05ZRSV61lq9osD0c8yMVvqQGbTCQQoyn9Cr/QjG/KlFh9pSIfa/gVVLDWrmXE+ 9wh53LbQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1s2TqE-0000000CLsa-2Zf9; Thu, 02 May 2024 10:39:06 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1s2TqC-0000000CLpO-0NoA; Thu, 02 May 2024 10:39:05 +0000 X-UUID: 2fc79758087011ef9a78ddf43a9225dc-20240502 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=YAkA0qWm0WibdgBc9DJ/ka2v14fCDYp1Wudifm+WvOw=; b=qZlky/UmGTC6es2ji4N29DVakenDy7fawYlVaSyU/mAfjyw+EyjkBKdPlBroTSZzghSd7Ad/k6+yQ4YgsabHwrBGLblC6fxsSCtHgVnic/vOgW68ea8CDAYI1rXvN8KnwI7PAe8K9Dj9Gvz14U2ipYLbuV/QlTZ46Mq8/J9Ccx0=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.38,REQID:7421931b-7834-4158-b8f1-e6eabdbd9852,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:82c5f88,CLOUDID:085a4592-e2c0-40b0-a8fe-7c7e47299109,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1, SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: 2fc79758087011ef9a78ddf43a9225dc-20240502 Received: from mtkmbs09n1.mediatek.inc [(172.21.101.35)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 523657783; Thu, 02 May 2024 03:39:00 -0700 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by MTKMBS14N1.mediatek.inc (172.21.101.75) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Thu, 2 May 2024 18:38:55 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Thu, 2 May 2024 18:38:55 +0800 From: Shawn Sung To: Chun-Kuang Hu , AngeloGioacchino Del Regno Subject: [PATCH v7 01/18] soc: mediatek: Disable 9-bit alpha in ETHDR Date: Thu, 2 May 2024 18:38:31 +0800 Message-ID: <20240502103848.5845-2-shawn.sung@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240502103848.5845-1-shawn.sung@mediatek.com> References: <20240502103848.5845-1-shawn.sung@mediatek.com> MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--4.084300-8.000000 X-TMASE-MatchedRID: gZQz39yqSjfX3tqA7xZNmyUCPpH7ESXaU+A7YkpDJ1ixUZq4R85n73pt C95MCcU3LYexjI/F2s7xHXxxAO/d2W5/NyTKlG694bl1FkKDELcoteqd/zXaI/ufvd3T2+v3dHv iJhofy1Hi8zVgXoAltsIJ+4gwXrEtwrbXMGDYqV+I3adjBtsMrMef3+4C/LmVSE4BVPJrmZoN9O zskhu7YlTJ6WXCIFydbfQZ3/6XbQ2HAdRETzvQbPCPl0YRUAlX0YcmHuIGC6bFuF1j/kyoEHZrU bEZipAEiWT09mQz7szw9kH8zAy44aOuVLnx3A74 X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--4.084300-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: 6FF9FC384157442A4EC319D965ED540AA9D1CAC02F3C36341F940B4D09B8EEB62000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240502_033904_200616_C798BF00 X-CRM114-Status: UNSURE ( 7.90 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Daniel Vetter , Sean Paul , Jason Chen , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, CK Hu , "Nancy . Lin" , linux-mediatek@lists.infradead.org, Bibby Hsieh , Matthias Brugger , Philipp Zabel , Hsiao Chien Sung , David Airlie , linux-arm-kernel@lists.infradead.org Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org From: Hsiao Chien Sung ETHDR 9-bit alpha should be disabled by default, otherwise alpha blending will not work. Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Hsiao Chien Sung --- drivers/soc/mediatek/mtk-mmsys.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c index f370f4ec4b888..938240714e54c 100644 --- a/drivers/soc/mediatek/mtk-mmsys.c +++ b/drivers/soc/mediatek/mtk-mmsys.c @@ -236,6 +236,7 @@ void mtk_mmsys_mixer_in_config(struct device *dev, int idx, bool alpha_sel, u16 mtk_mmsys_update_bits(mmsys, MT8195_VDO1_MIXER_IN1_ALPHA + (idx - 1) * 4, ~0, alpha << 16 | alpha, cmdq_pkt); + mtk_mmsys_update_bits(mmsys, MT8195_VDO1_HDR_TOP_CFG, BIT(15 + idx), 0, cmdq_pkt); mtk_mmsys_update_bits(mmsys, MT8195_VDO1_HDR_TOP_CFG, BIT(19 + idx), alpha_sel << (19 + idx), cmdq_pkt); mtk_mmsys_update_bits(mmsys, MT8195_VDO1_MIXER_IN1_PAD + (idx - 1) * 4,