| Message ID | 20240729073428.28983-3-me@adomerle.xyz (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Initial preparations for MT6765 | expand |
Il 29/07/24 09:34, Arseniy Velikanov ha scritto: > Add PWRAP gate > > Fixes: 1aca9939bf72 ("clk: mediatek: Add MT6765 clock support") > Signed-off-by: Arseniy Velikanov <me@adomerle.xyz> Agreed, but please remove the fixes tag and add a better commit description. Something like... Add the missing PWRAP gate clock, used for communicating with the PMIC through the PMIC Wrapper hardware. Cheers, Angelo > --- > drivers/clk/mediatek/clk-mt6765.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/clk/mediatek/clk-mt6765.c b/drivers/clk/mediatek/clk-mt6765.c > index d53731e7933f..4f03a0df4ff0 100644 > --- a/drivers/clk/mediatek/clk-mt6765.c > +++ b/drivers/clk/mediatek/clk-mt6765.c > @@ -559,6 +559,7 @@ static const struct mtk_gate ifr_clks[] = { > /* INFRA_TOPAXI */ > /* INFRA PERI */ > /* INFRA mode 0 */ > + GATE_IFR2(CLK_IFR_PMIC_AP, "ifr_pmic_ap", "axi_ck", 1), > GATE_IFR2(CLK_IFR_ICUSB, "ifr_icusb", "axi_ck", 8), > GATE_IFR2(CLK_IFR_GCE, "ifr_gce", "axi_ck", 9), > GATE_IFR2(CLK_IFR_THERM, "ifr_therm", "axi_ck", 10),
diff --git a/drivers/clk/mediatek/clk-mt6765.c b/drivers/clk/mediatek/clk-mt6765.c index d53731e7933f..4f03a0df4ff0 100644 --- a/drivers/clk/mediatek/clk-mt6765.c +++ b/drivers/clk/mediatek/clk-mt6765.c @@ -559,6 +559,7 @@ static const struct mtk_gate ifr_clks[] = { /* INFRA_TOPAXI */ /* INFRA PERI */ /* INFRA mode 0 */ + GATE_IFR2(CLK_IFR_PMIC_AP, "ifr_pmic_ap", "axi_ck", 1), GATE_IFR2(CLK_IFR_ICUSB, "ifr_icusb", "axi_ck", 8), GATE_IFR2(CLK_IFR_GCE, "ifr_gce", "axi_ck", 9), GATE_IFR2(CLK_IFR_THERM, "ifr_therm", "axi_ck", 10),
Add PWRAP gate Fixes: 1aca9939bf72 ("clk: mediatek: Add MT6765 clock support") Signed-off-by: Arseniy Velikanov <me@adomerle.xyz> --- drivers/clk/mediatek/clk-mt6765.c | 1 + 1 file changed, 1 insertion(+)