| Message ID | 20240918-airoha-eth-pse-fix-v1-1-7b61f26cd2fd@kernel.org (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | [net] net: airoha: fix PSE memory configuration in airoha_fe_pse_ports_init() | expand |
On Wed, Sep 18, 2024 at 04:37:30PM +0200, Lorenzo Bianconi wrote: > Align PSE memory configuration to vendor SDK. In particular, increase > initial value of PSE reserved memory in airoha_fe_pse_ports_init() > routine by the value used for the second Packet Processor Engine (PPE2) > and do not overwrite the default value. > Moreover, store the initial value for PSE reserved memory in orig_val > before running airoha_fe_set_pse_queue_rsv_pages() in > airoha_fe_set_pse_oq_rsv routine. Hi Lorenzo, This patch seems to be addressing two issues, perhaps it would be best to split it into two patches? And as a fix (or fixes) I think it would be best to describe the problem, typically a user-visible bug, that is being addressed. > Fixes: 23020f049327 ("net: airoha: Introduce ethernet support for EN7581 SoC") > Tested-by: Sayantan Nandy <sayantan.nandy@airoha.com> > Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> ...
> On Wed, Sep 18, 2024 at 04:37:30PM +0200, Lorenzo Bianconi wrote: > > Align PSE memory configuration to vendor SDK. In particular, increase > > initial value of PSE reserved memory in airoha_fe_pse_ports_init() > > routine by the value used for the second Packet Processor Engine (PPE2) > > and do not overwrite the default value. > > Moreover, store the initial value for PSE reserved memory in orig_val > > before running airoha_fe_set_pse_queue_rsv_pages() in > > airoha_fe_set_pse_oq_rsv routine. > > Hi Lorenzo, Hi Simon, > > This patch seems to be addressing two issues, perhaps it would be best > to split it into two patches? ack, I will do. > > And as a fix (or fixes) I think it would be best to describe the > problem, typically a user-visible bug, that is being addressed. This is not a user-visible bug, do you think it is better to post it to net-next (when it is open)? Regards, Lorenzo > > > Fixes: 23020f049327 ("net: airoha: Introduce ethernet support for EN7581 SoC") > > Tested-by: Sayantan Nandy <sayantan.nandy@airoha.com> > > Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> > > ...
On Thu, Sep 19, 2024 at 02:58:15PM +0200, Lorenzo Bianconi wrote: > > On Wed, Sep 18, 2024 at 04:37:30PM +0200, Lorenzo Bianconi wrote: > > > Align PSE memory configuration to vendor SDK. In particular, increase > > > initial value of PSE reserved memory in airoha_fe_pse_ports_init() > > > routine by the value used for the second Packet Processor Engine (PPE2) > > > and do not overwrite the default value. > > > Moreover, store the initial value for PSE reserved memory in orig_val > > > before running airoha_fe_set_pse_queue_rsv_pages() in > > > airoha_fe_set_pse_oq_rsv routine. > > > > Hi Lorenzo, > > Hi Simon, Hi Lorenzo, > > > > This patch seems to be addressing two issues, perhaps it would be best > > to split it into two patches? > > ack, I will do. Thanks. > > And as a fix (or fixes) I think it would be best to describe the > > problem, typically a user-visible bug, that is being addressed. > > This is not a user-visible bug, do you think it is better to post it to > net-next (when it is open)? Yes, I think that would be best. If you do so please don't included any Fixes tags. Instead, if you want to refer to a patch, use the following syntax within the patch description. AFAIK, unlike Fixes tags, it may be line wrapped as appropriate. commit 23020f049327 ("net: airoha: Introduce ethernet support for EN7581 SoC") > > Regards, > Lorenzo > > > > > > Fixes: 23020f049327 ("net: airoha: Introduce ethernet support for EN7581 SoC") > > > Tested-by: Sayantan Nandy <sayantan.nandy@airoha.com> > > > Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> > > > > ...
> On Thu, Sep 19, 2024 at 02:58:15PM +0200, Lorenzo Bianconi wrote: > > > On Wed, Sep 18, 2024 at 04:37:30PM +0200, Lorenzo Bianconi wrote: > > > > Align PSE memory configuration to vendor SDK. In particular, increase > > > > initial value of PSE reserved memory in airoha_fe_pse_ports_init() > > > > routine by the value used for the second Packet Processor Engine (PPE2) > > > > and do not overwrite the default value. > > > > Moreover, store the initial value for PSE reserved memory in orig_val > > > > before running airoha_fe_set_pse_queue_rsv_pages() in > > > > airoha_fe_set_pse_oq_rsv routine. > > > > > > Hi Lorenzo, > > > > Hi Simon, > > Hi Lorenzo, > > > > > > > This patch seems to be addressing two issues, perhaps it would be best > > > to split it into two patches? > > > > ack, I will do. > > Thanks. > > > > And as a fix (or fixes) I think it would be best to describe the > > > problem, typically a user-visible bug, that is being addressed. > > > > This is not a user-visible bug, do you think it is better to post it to > > net-next (when it is open)? > > Yes, I think that would be best. ack, fine to me. > > If you do so please don't included any Fixes tags. > Instead, if you want to refer to a patch, use the > following syntax within the patch description. > AFAIK, unlike Fixes tags, it may be line wrapped as appropriate. > > commit 23020f049327 ("net: airoha: Introduce ethernet support for EN7581 SoC") ack, fine. I was not aware of it :) Regards, Lorenzo > > > > > Regards, > > Lorenzo > > > > > > > > > Fixes: 23020f049327 ("net: airoha: Introduce ethernet support for EN7581 SoC") > > > > Tested-by: Sayantan Nandy <sayantan.nandy@airoha.com> > > > > Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> > > > > > > ... > >
diff --git a/drivers/net/ethernet/mediatek/airoha_eth.c b/drivers/net/ethernet/mediatek/airoha_eth.c index 930f180688e5..2e01abc70c17 100644 --- a/drivers/net/ethernet/mediatek/airoha_eth.c +++ b/drivers/net/ethernet/mediatek/airoha_eth.c @@ -1116,17 +1116,23 @@ static void airoha_fe_set_pse_queue_rsv_pages(struct airoha_eth *eth, PSE_CFG_WR_EN_MASK | PSE_CFG_OQRSV_SEL_MASK); } +static u32 airoha_fe_get_pse_all_rsv(struct airoha_eth *eth) +{ + u32 val = airoha_fe_rr(eth, REG_FE_PSE_BUF_SET); + + return FIELD_GET(PSE_ALLRSV_MASK, val); +} + static int airoha_fe_set_pse_oq_rsv(struct airoha_eth *eth, u32 port, u32 queue, u32 val) { - u32 orig_val, tmp, all_rsv, fq_limit; + u32 orig_val = airoha_fe_get_pse_queue_rsv_pages(eth, port, queue); + u32 tmp, all_rsv, fq_limit; airoha_fe_set_pse_queue_rsv_pages(eth, port, queue, val); /* modify all rsv */ - orig_val = airoha_fe_get_pse_queue_rsv_pages(eth, port, queue); - tmp = airoha_fe_rr(eth, REG_FE_PSE_BUF_SET); - all_rsv = FIELD_GET(PSE_ALLRSV_MASK, tmp); + all_rsv = airoha_fe_get_pse_all_rsv(eth); all_rsv += (val - orig_val); airoha_fe_rmw(eth, REG_FE_PSE_BUF_SET, PSE_ALLRSV_MASK, FIELD_PREP(PSE_ALLRSV_MASK, all_rsv)); @@ -1166,11 +1172,13 @@ static void airoha_fe_pse_ports_init(struct airoha_eth *eth) [FE_PSE_PORT_GDM4] = 2, [FE_PSE_PORT_CDM5] = 2, }; + u32 all_rsv; int q; + all_rsv = airoha_fe_get_pse_all_rsv(eth); /* hw misses PPE2 oq rsv */ - airoha_fe_set(eth, REG_FE_PSE_BUF_SET, - PSE_RSV_PAGES * pse_port_num_queues[FE_PSE_PORT_PPE2]); + all_rsv += PSE_RSV_PAGES * pse_port_num_queues[FE_PSE_PORT_PPE2]; + airoha_fe_set(eth, REG_FE_PSE_BUF_SET, all_rsv); /* CMD1 */ for (q = 0; q < pse_port_num_queues[FE_PSE_PORT_CDM1]; q++)
Align PSE memory configuration to vendor SDK. In particular, increase initial value of PSE reserved memory in airoha_fe_pse_ports_init() routine by the value used for the second Packet Processor Engine (PPE2) and do not overwrite the default value. Moreover, store the initial value for PSE reserved memory in orig_val before running airoha_fe_set_pse_queue_rsv_pages() in airoha_fe_set_pse_oq_rsv routine. Fixes: 23020f049327 ("net: airoha: Introduce ethernet support for EN7581 SoC") Tested-by: Sayantan Nandy <sayantan.nandy@airoha.com> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> --- drivers/net/ethernet/mediatek/airoha_eth.c | 20 ++++++++++++++------ 1 file changed, 14 insertions(+), 6 deletions(-) --- base-commit: 9410645520e9b820069761f3450ef6661418e279 change-id: 20240918-airoha-eth-pse-fix-641d0cf686c0 Best regards,