| Message ID | 20241001-airoha-eth-pse-fix-v2-2-9a56cdffd074@kernel.org (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | net: airoha: Fix PSE memory configuration | expand |
On Tue, Oct 01, 2024 at 12:10:25PM +0200, Lorenzo Bianconi wrote: > Align PSE memory configuration to vendor SDK. In particular, increase > initial value of PSE reserved memory in airoha_fe_pse_ports_init() > routine by the value used for the second Packet Processor Engine (PPE2) > and do not overwrite the default value. > > Introduced by commit 23020f049327 ("net: airoha: Introduce ethernet support > for EN7581 SoC") > > Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Reviewed-by: Simon Horman <horms@kernel.org>
diff --git a/drivers/net/ethernet/mediatek/airoha_eth.c b/drivers/net/ethernet/mediatek/airoha_eth.c index 480540526bdb..2e01abc70c17 100644 --- a/drivers/net/ethernet/mediatek/airoha_eth.c +++ b/drivers/net/ethernet/mediatek/airoha_eth.c @@ -1172,11 +1172,13 @@ static void airoha_fe_pse_ports_init(struct airoha_eth *eth) [FE_PSE_PORT_GDM4] = 2, [FE_PSE_PORT_CDM5] = 2, }; + u32 all_rsv; int q; + all_rsv = airoha_fe_get_pse_all_rsv(eth); /* hw misses PPE2 oq rsv */ - airoha_fe_set(eth, REG_FE_PSE_BUF_SET, - PSE_RSV_PAGES * pse_port_num_queues[FE_PSE_PORT_PPE2]); + all_rsv += PSE_RSV_PAGES * pse_port_num_queues[FE_PSE_PORT_PPE2]; + airoha_fe_set(eth, REG_FE_PSE_BUF_SET, all_rsv); /* CMD1 */ for (q = 0; q < pse_port_num_queues[FE_PSE_PORT_CDM1]; q++)
Align PSE memory configuration to vendor SDK. In particular, increase initial value of PSE reserved memory in airoha_fe_pse_ports_init() routine by the value used for the second Packet Processor Engine (PPE2) and do not overwrite the default value. Introduced by commit 23020f049327 ("net: airoha: Introduce ethernet support for EN7581 SoC") Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> --- drivers/net/ethernet/mediatek/airoha_eth.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)