From patchwork Tue Oct 8 06:47:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Jason-JH.Lin" X-Patchwork-Id: 13825707 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EBE9CCED273 for ; Tue, 8 Oct 2024 06:51:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type:MIME-Version: References:In-Reply-To:Message-ID:Date:Subject:CC:To:From:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=+FbA+Ab/4KXXj/A8FnFBy/xvag8XOJD9avoyDGbvWwU=; b=IzQGS9jKQBPflb2tdp8R4FApSU 4npfiAN2oO2ECLuwPT9QIVF0NblbzDx22Y/H3BmS/yrZorHhI07TDfVMYuIRiXAscDHiM943twJVR sH2melJz6VxoBNeTi9RbgPf/Xk4W+kWPPNhAai9HiE6cLIsitDc0BO+rQxqqL3hqDh4r81e+op1V0 AFCVm7jZX+4lGfFx+ueY63QIRxURcxV/Ea2bTkuaNnlwfKEYaiSiU8+qT18NpeBgvYsBZAMk+PyFe J1XZto05EdN2DqRoNeiwbpnt10aV7oyaU4SwVOzHRHaGqHbk2NJFdJ5I5zGQ+wrSdES+3yi4+h5cy a+EoRgxQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1sy445-00000004i5j-3vI8; Tue, 08 Oct 2024 06:51:25 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1sy40E-00000004hTk-27XT; Tue, 08 Oct 2024 06:47:28 +0000 X-UUID: 2b572afa854111efba0aef63c0775dbf-20241007 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=+FbA+Ab/4KXXj/A8FnFBy/xvag8XOJD9avoyDGbvWwU=; b=BxSZ7oCg+5k0wC4e4t4RRV0OlTpg9riXec827mwDhKRzC5tA8yGL8xQWSRJY7lfZfzxK38U+Ev9c1Eo07yJ5mAF6fY4Vb4KmyrmfUZ5kpdPeG2uMxpMEmI3lWmbdco3pLg6McObk6YW+fq9LWIO+b95tG3ft3rhPDyVmyF+Hm3w=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.41,REQID:e79b9ca1-42be-4ce3-bbb4-7ee25471d405,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:6dc6a47,CLOUDID:01efe964-444a-4b47-a99a-591ade3b04b2,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1, SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: 2b572afa854111efba0aef63c0775dbf-20241007 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1111200552; Mon, 07 Oct 2024 23:47:21 -0700 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Tue, 8 Oct 2024 14:47:17 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Tue, 8 Oct 2024 14:47:17 +0800 From: Jason-JH.Lin To: Adam Thiede , Yassine Oudjana , Chun-Kuang Hu , AngeloGioacchino Del Regno CC: Shawn Sung , Alper Nebi Yasak , , , , , "Jason-JH . Lin" , Singo Chang , "Nancy Lin" , Subject: [PATCH v10 1/5] drm/mediatek: ovl: Fix XRGB format breakage for blend_modes unsupported SoCs Date: Tue, 8 Oct 2024 14:47:12 +0800 Message-ID: <20241008064716.14670-2-jason-jh.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20241008064716.14670-1-jason-jh.lin@mediatek.com> References: <20241008064716.14670-1-jason-jh.lin@mediatek.com> MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--5.252500-8.000000 X-TMASE-MatchedRID: 61l6kdP/ldn2fv0LTPfvM4dlc1JaOB1TUAjrAJWsTe/KP6Yywb5aNnv7 Io91rBfwD2EF2wJcjhdx0DfvHApiHUIjaJSsaV6qQ4srjeRbxTZCX8V1FiRRkt9RlPzeVuQQVSd AA6mVeIb2Xf9YmQBFcj48erx7ecjeHxPMjOKY7A8LbigRnpKlKWxlRJiH4397MXK0ttZlczajEi cMpiI5KLc6YnNjZja3DYIajShd9uDehs/W0SS5gw== X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--5.252500-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: 8F0398ED3399A163E5816C34E8A7E4B6F70EBBCC414779A726DE9824CEA240452000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241007_234726_665842_3A08CFA3 X-CRM114-Status: GOOD ( 13.13 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org OVL_CON_AEN is for alpha blending enable. For the SoC that is supported the blend_modes, OVL_CON_AEN will always enabled to use constant alpha and then use the ignore_pixel_alpha bit to do the alpha blending for XRGB8888 format. Note that ignore pixel alpha bit is not supported if the SoC is not supported the blend_modes. So it will break the original setting of XRGB8888 foramt for the blend_modes unsupported SoCs, such as MT8173. To fix the downgrade issue, enable alpha blending only when a valid blend_mode or has_alpha is set. Fixes: bc46eb5d5d77 ("drm/mediatek: Support DRM plane alpha in OVL") Signed-off-by: Jason-JH.Lin Reviewed-by: CK Hu --- drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c index 89b439dcf3a6..047cd1796a51 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c @@ -473,8 +473,14 @@ void mtk_ovl_layer_config(struct device *dev, unsigned int idx, con = ovl_fmt_convert(ovl, fmt, blend_mode); if (state->base.fb) { - con |= OVL_CON_AEN; con |= state->base.alpha & OVL_CON_ALPHA; + + /* + * For blend_modes supported SoCs, always enable alpha blending. + * For blend_modes unsupported SoCs, enable alpha blending when has_alpha is set. + */ + if (blend_mode || state->base.fb->format->has_alpha) + con |= OVL_CON_AEN; } /* CONST_BLD must be enabled for XRGB formats although the alpha channel