| Message ID | 20241202122602.30734-5-linux@fw-web.de (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | continue mt7988 devicetree work | expand |
Il 02/12/24 13:25, Frank Wunderlich ha scritto: > From: Frank Wunderlich <frank-w@public-files.de> > > Add Low Voltage Thermal Sensor (LVTS) node for mt7988 SoC. > > Signed-off-by: Frank Wunderlich <frank-w@public-files.de> > --- > changes: > > v2: > squash > - "arm64: dts: mediatek: mt7988: add label for efuse" > - "arm64: dts: mediatek: mt7988: extend efuse node" (drop other efuse subnodes) > --- > arch/arm64/boot/dts/mediatek/mt7988a.dtsi | 19 ++++++++++++++++++- > 1 file changed, 18 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi > index 5e40446cb7b3..f7748a840297 100644 > --- a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi > @@ -4,6 +4,7 @@ > #include <dt-bindings/interrupt-controller/arm-gic.h> > #include <dt-bindings/phy/phy.h> > #include <dt-bindings/pinctrl/mt65xx.h> > +#include <dt-bindings/reset/mediatek,mt7988-resets.h> > > / { > compatible = "mediatek,mt7988a"; > @@ -85,6 +86,7 @@ infracfg: clock-controller@10001000 { > compatible = "mediatek,mt7988-infracfg", "syscon"; > reg = <0 0x10001000 0 0x1000>; > #clock-cells = <1>; > + #reset-cells = <1>; > }; > > topckgen: clock-controller@1001b000 { > @@ -250,6 +252,17 @@ i2c@11005000 { > status = "disabled"; > }; > > + lvts: lvts@1100a000 { > + compatible = "mediatek,mt7988-lvts-ap"; > + #thermal-sensor-cells = <1>; > + reg = <0 0x1100a000 0 0x1000>; > + clocks = <&infracfg CLK_INFRA_26M_THERM_SYSTEM>; > + interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; > + resets = <&infracfg MT7988_INFRA_RST1_THERM_CTRL_SWRST>; > + nvmem-cells = <&lvts_calibration>; > + nvmem-cell-names = "lvts-calib-data-1"; > + }; > + > usb@11190000 { > compatible = "mediatek,mt7988-xhci", "mediatek,mtk-xhci"; > reg = <0 0x11190000 0 0x2e00>, > @@ -307,11 +320,15 @@ clock-controller@11f40000 { > #clock-cells = <1>; > }; > > - efuse@11f50000 { > + efuse: efuse@11f50000 { Okay but why are you adding the efuse handle name to this node? You're not using it anywhere as far as I can see. Please drop this change - after which: Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > compatible = "mediatek,mt7988-efuse", "mediatek,efuse"; > reg = <0 0x11f50000 0 0x1000>; > #address-cells = <1>; > #size-cells = <1>; > + > + lvts_calibration: calib@918 { > + reg = <0x918 0x28>; > + }; > }; > > clock-controller@15000000 {
diff --git a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi index 5e40446cb7b3..f7748a840297 100644 --- a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi @@ -4,6 +4,7 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/phy/phy.h> #include <dt-bindings/pinctrl/mt65xx.h> +#include <dt-bindings/reset/mediatek,mt7988-resets.h> / { compatible = "mediatek,mt7988a"; @@ -85,6 +86,7 @@ infracfg: clock-controller@10001000 { compatible = "mediatek,mt7988-infracfg", "syscon"; reg = <0 0x10001000 0 0x1000>; #clock-cells = <1>; + #reset-cells = <1>; }; topckgen: clock-controller@1001b000 { @@ -250,6 +252,17 @@ i2c@11005000 { status = "disabled"; }; + lvts: lvts@1100a000 { + compatible = "mediatek,mt7988-lvts-ap"; + #thermal-sensor-cells = <1>; + reg = <0 0x1100a000 0 0x1000>; + clocks = <&infracfg CLK_INFRA_26M_THERM_SYSTEM>; + interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; + resets = <&infracfg MT7988_INFRA_RST1_THERM_CTRL_SWRST>; + nvmem-cells = <&lvts_calibration>; + nvmem-cell-names = "lvts-calib-data-1"; + }; + usb@11190000 { compatible = "mediatek,mt7988-xhci", "mediatek,mtk-xhci"; reg = <0 0x11190000 0 0x2e00>, @@ -307,11 +320,15 @@ clock-controller@11f40000 { #clock-cells = <1>; }; - efuse@11f50000 { + efuse: efuse@11f50000 { compatible = "mediatek,mt7988-efuse", "mediatek,efuse"; reg = <0 0x11f50000 0 0x1000>; #address-cells = <1>; #size-cells = <1>; + + lvts_calibration: calib@918 { + reg = <0x918 0x28>; + }; }; clock-controller@15000000 {