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[93.34.91.161]) by smtp.googlemail.com with ESMTPSA id ffacd0b85a97d-38bf3215023sm11095390f8f.9.2025.01.20.10.48.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jan 2025 10:48:14 -0800 (PST) From: Christian Marangi To: Chaotian Jing , Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Wenbin Mei , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, upstream@airoha.com Cc: Christian Marangi Subject: [PATCH v2 1/2] dt-bindings: mmc: mtk-sd: Add eMMC for AN7581 Date: Mon, 20 Jan 2025 19:47:01 +0100 Message-ID: <20250120184728.18325-1-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.47.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250120_104817_017089_D2B478FD X-CRM114-Status: GOOD ( 12.84 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Document eMMC compatible for AN7581. This eMMC controller doesn't have regulator exposed to the system and have a single clock only for source clock and only default pintctrl. Rework the schema to permit these new requirements and make supply optional only for airoha,an7581-mmc compatible. Also provide an example for airoha,an7581-mmc. Signed-off-by: Christian Marangi --- Changes v2: - Drop else condition - Move Required and pinctrl property to dedicated if condition .../devicetree/bindings/mmc/mtk-sd.yaml | 116 +++++++++++++++++- 1 file changed, 110 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml index f86ebd81f5a5..4c1da48aaa1b 100644 --- a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml @@ -14,6 +14,7 @@ properties: compatible: oneOf: - enum: + - airoha,an7581-mmc - mediatek,mt2701-mmc - mediatek,mt2712-mmc - mediatek,mt6779-mmc @@ -48,11 +49,11 @@ properties: clocks: description: Should contain phandle for the clock feeding the MMC controller. - minItems: 2 + minItems: 1 maxItems: 7 clock-names: - minItems: 2 + minItems: 1 maxItems: 7 interrupts: @@ -72,7 +73,7 @@ properties: Should at least contain default and state_uhs. To support SDIO in-band wakeup, dat1 pin will be switched between GPIO mode and SDIO DAT1 mode, state_eint is mandatory in this scenario. - minItems: 2 + minItems: 1 items: - const: default - const: state_uhs @@ -170,9 +171,6 @@ required: - clock-names - pinctrl-names - pinctrl-0 - - pinctrl-1 - - vmmc-supply - - vqmmc-supply allOf: - $ref: mmc-controller.yaml# @@ -275,12 +273,14 @@ allOf: then: properties: clocks: + minItems: 2 items: - description: source clock - description: HCLK which used for host - description: Advanced eXtensible Interface - description: Advanced High-performance Bus clock clock-names: + minItems: 2 items: - const: source - const: hclk @@ -317,6 +317,7 @@ allOf: then: properties: clocks: + minItems: 2 items: - description: source clock - description: HCLK which used for host @@ -326,6 +327,7 @@ allOf: - description: AXI bus clock gate - description: AHB bus clock gate clock-names: + minItems: 2 items: - const: source - const: hclk @@ -335,6 +337,89 @@ allOf: - const: axi_cg - const: ahb_cg + - if: + properties: + compatible: + contains: + const: airoha,an7581-mmc + then: + properties: + clocks: + items: + - description: source clock + + clock-names: + items: + - const: source + + - if: + properties: + compatible: + enum: + - mediatek,mt2701-mmc + - mediatek,mt2712-mmc + - mediatek,mt6779-mmc + - mediatek,mt6795-mmc + - mediatek,mt7620-mmc + - mediatek,mt7622-mmc + - mediatek,mt7623-mmc + - mediatek,mt7986-mmc + - mediatek,mt7988-mmc + - mediatek,mt8135-mmc + - mediatek,mt8173-mmc + - mediatek,mt8183-mmc + - mediatek,mt8186-mmc + - mediatek,mt8188-mmc + - mediatek,mt8192-mmc + - mediatek,mt8195-mmc + - mediatek,mt8196-mmc + - mediatek,mt8365-mmc + - mediatek,mt8516-mmc + then: + properties: + pinctrl-names: + minItems: 2 + + - if: + properties: + compatible: + contains: + const: airoha,an7581-mmc + then: + properties: + pinctrl-names: + items: + - const: default + + - if: + properties: + compatible: + enum: + - mediatek,mt2701-mmc + - mediatek,mt2712-mmc + - mediatek,mt6779-mmc + - mediatek,mt6795-mmc + - mediatek,mt7620-mmc + - mediatek,mt7622-mmc + - mediatek,mt7623-mmc + - mediatek,mt7986-mmc + - mediatek,mt7988-mmc + - mediatek,mt8135-mmc + - mediatek,mt8173-mmc + - mediatek,mt8183-mmc + - mediatek,mt8186-mmc + - mediatek,mt8188-mmc + - mediatek,mt8192-mmc + - mediatek,mt8195-mmc + - mediatek,mt8196-mmc + - mediatek,mt8365-mmc + - mediatek,mt8516-mmc + then: + required: + - pinctrl-1 + - vmmc-supply + - vqmmc-supply + unevaluatedProperties: false examples: @@ -389,5 +474,24 @@ examples: vqmmc-supply = <&mt6397_vgp3_reg>; mmc-pwrseq = <&wifi_pwrseq>; }; + - | + #include + #include + #include + mmc@1fa0e000 { + compatible = "airoha,an7581-mmc"; + reg = <0x1fa0e000 0x1000>, + <0x1fa0c000 0x60>; + clocks = <&scuclk EN7581_CLK_EMMC>; + clock-names = "source"; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&mmc_pins>; + bus-width = <4>; + max-frequency = <52000000>; + disable-wp; + cap-mmc-highspeed; + non-removable; + }; ...