| Message ID | 20250209-airoha-en7581-flowtable-offload-v3-11-dba60e755563@kernel.org (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Introduce flowtable hw offloading in airoha_eth driver | expand |
On Sun, Feb 09, 2025 at 01:09:04PM +0100, Lorenzo Bianconi wrote: > This patch adds the NPU document binding for EN7581 SoC. > The Airoha Network Processor Unit (NPU) provides a configuration interface > to implement wired and wireless hardware flow offloading programming Packet > Processor Engine (PPE) flow table. > > Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> > --- > .../devicetree/bindings/arm/airoha,en7581-npu.yaml | 71 ++++++++++++++++++++++ > 1 file changed, 71 insertions(+) > > diff --git a/Documentation/devicetree/bindings/arm/airoha,en7581-npu.yaml b/Documentation/devicetree/bindings/arm/airoha,en7581-npu.yaml > new file mode 100644 > index 0000000000000000000000000000000000000000..a5bcfa299e7cd54f51e70f7ded113f1efcd3e8b7 > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/airoha,en7581-npu.yaml arm is for top-level nodes, this has to go to proper directory or as last-resort to the soc. > @@ -0,0 +1,71 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/arm/airoha,en7581-npu.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Airoha Network Processor Unit for EN7581 SoC > + > +maintainers: > + - Lorenzo Bianconi <lorenzo@kernel.org> > + > +description: > + The Airoha Network Processor Unit (NPU) provides a configuration interface > + to implement wired and wireless hardware flow offloading programming Packet > + Processor Engine (PPE) flow table. Sounds like network device, so maybe net? > + > +properties: > + compatible: > + items: > + - enum: > + - airoha,en7581-npu > + - const: syscon > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 15 You need to list the items. > + > + memory-region: > + maxItems: 1 > + description: > + Phandle to the node describing memory used to store NPU firmware binary. s/Phandle to the node describing// Best regards, Krzysztof
On Feb 11, Krzysztof Kozlowski wrote: > On Sun, Feb 09, 2025 at 01:09:04PM +0100, Lorenzo Bianconi wrote: > > This patch adds the NPU document binding for EN7581 SoC. > > The Airoha Network Processor Unit (NPU) provides a configuration interface > > to implement wired and wireless hardware flow offloading programming Packet > > Processor Engine (PPE) flow table. > > > > Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> > > --- > > .../devicetree/bindings/arm/airoha,en7581-npu.yaml | 71 ++++++++++++++++++++++ > > 1 file changed, 71 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/arm/airoha,en7581-npu.yaml b/Documentation/devicetree/bindings/arm/airoha,en7581-npu.yaml > > new file mode 100644 > > index 0000000000000000000000000000000000000000..a5bcfa299e7cd54f51e70f7ded113f1efcd3e8b7 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/arm/airoha,en7581-npu.yaml > > arm is for top-level nodes, this has to go to proper directory or as > last-resort to the soc. > > > @@ -0,0 +1,71 @@ > > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/arm/airoha,en7581-npu.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Airoha Network Processor Unit for EN7581 SoC > > + > > +maintainers: > > + - Lorenzo Bianconi <lorenzo@kernel.org> > > + > > +description: > > + The Airoha Network Processor Unit (NPU) provides a configuration interface > > + to implement wired and wireless hardware flow offloading programming Packet > > + Processor Engine (PPE) flow table. > > Sounds like network device, so maybe net? yes. Do you mean to move it in Documentation/devicetree/bindings/net/ ? > > > + > > +properties: > > + compatible: > > + items: > > + - enum: > > + - airoha,en7581-npu > > + - const: syscon > > + > > + reg: > > + maxItems: 1 > > + > > + interrupts: > > + maxItems: 15 > > You need to list the items. ack, I will fix it. > > > + > > + memory-region: > > + maxItems: 1 > > + description: > > + Phandle to the node describing memory used to store NPU firmware binary. > > s/Phandle to the node describing// ack, I will fix it. Regards, Lorenzo > > Best regards, > Krzysztof >
On Tue, Feb 11, 2025 at 05:32:51PM +0100, Lorenzo Bianconi wrote: > On Feb 11, Krzysztof Kozlowski wrote: > > On Sun, Feb 09, 2025 at 01:09:04PM +0100, Lorenzo Bianconi wrote: > > > This patch adds the NPU document binding for EN7581 SoC. > > > The Airoha Network Processor Unit (NPU) provides a configuration interface > > > to implement wired and wireless hardware flow offloading programming Packet > > > Processor Engine (PPE) flow table. > > > > > > Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> > > > --- > > > .../devicetree/bindings/arm/airoha,en7581-npu.yaml | 71 ++++++++++++++++++++++ > > > 1 file changed, 71 insertions(+) > > > > > > diff --git a/Documentation/devicetree/bindings/arm/airoha,en7581-npu.yaml b/Documentation/devicetree/bindings/arm/airoha,en7581-npu.yaml > > > new file mode 100644 > > > index 0000000000000000000000000000000000000000..a5bcfa299e7cd54f51e70f7ded113f1efcd3e8b7 > > > --- /dev/null > > > +++ b/Documentation/devicetree/bindings/arm/airoha,en7581-npu.yaml > > > > arm is for top-level nodes, this has to go to proper directory or as > > last-resort to the soc. > > > > > @@ -0,0 +1,71 @@ > > > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > > > +%YAML 1.2 > > > +--- > > > +$id: http://devicetree.org/schemas/arm/airoha,en7581-npu.yaml# > > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > > + > > > +title: Airoha Network Processor Unit for EN7581 SoC > > > + > > > +maintainers: > > > + - Lorenzo Bianconi <lorenzo@kernel.org> > > > + > > > +description: > > > + The Airoha Network Processor Unit (NPU) provides a configuration interface > > > + to implement wired and wireless hardware flow offloading programming Packet > > > + Processor Engine (PPE) flow table. > > > > Sounds like network device, so maybe net? > > yes. Do you mean to move it in Documentation/devicetree/bindings/net/ ? Yes... and no, because after second look at your driver it looks more like a mailbox. So basically I don't know. I usually hope contributors know better. :) If this is onlt mailbox provider, then should be placed in mailbox. If this is much more (including mailbox) but main function is network, then could be in net. So it all depends... Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/arm/airoha,en7581-npu.yaml b/Documentation/devicetree/bindings/arm/airoha,en7581-npu.yaml new file mode 100644 index 0000000000000000000000000000000000000000..a5bcfa299e7cd54f51e70f7ded113f1efcd3e8b7 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/airoha,en7581-npu.yaml @@ -0,0 +1,71 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/airoha,en7581-npu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Airoha Network Processor Unit for EN7581 SoC + +maintainers: + - Lorenzo Bianconi <lorenzo@kernel.org> + +description: + The Airoha Network Processor Unit (NPU) provides a configuration interface + to implement wired and wireless hardware flow offloading programming Packet + Processor Engine (PPE) flow table. + +properties: + compatible: + items: + - enum: + - airoha,en7581-npu + - const: syscon + + reg: + maxItems: 1 + + interrupts: + maxItems: 15 + + memory-region: + maxItems: 1 + description: + Phandle to the node describing memory used to store NPU firmware binary. + +required: + - compatible + - reg + - interrupts + - memory-region + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + soc { + #address-cells = <2>; + #size-cells = <2>; + + npu@1e900000 { + compatible = "airoha,en7581-npu", "syscon"; + reg = <0 0x1e900000 0 0x313000>; + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>; + memory-region = <&npu_binary>; + }; + };
This patch adds the NPU document binding for EN7581 SoC. The Airoha Network Processor Unit (NPU) provides a configuration interface to implement wired and wireless hardware flow offloading programming Packet Processor Engine (PPE) flow table. Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> --- .../devicetree/bindings/arm/airoha,en7581-npu.yaml | 71 ++++++++++++++++++++++ 1 file changed, 71 insertions(+)