From patchwork Tue Feb 11 11:34:07 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 13969693 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 04627C0219B for ; Tue, 11 Feb 2025 12:32:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=nTmxxRaSIq/BNRcUrIeT6gEQnBwOsMLcnkXt1rJvZZU=; b=tKchVTw1VuUjSapXDXKSdLoNGg Aji7nvtVP9dTvCikGUjwEgKgNNzOFbdaZfdDU/4Zn6tVCdjt7QMF13RKPW9IiDLEA0j8XOCTKZrLN 2vkZnrazIV+o9a8Q2ST0yFjb+XUDP+ivl2oc0Kko2RZQDoM+XBxYY2nDFkokr9SLOpjrQpvZwz/kg Zl8ApKrL9Uv59Sy5md2j+3bod1/ft4ozrLkDoabctBZiwOYRKWwPLPCtuLORU1oDigNTneDIbNi8F wf33g/f8aMfhPEXk+8r3MH3WwwRhDRb30O5wuqWIVDOQYIpcu2bL9S7wjI0ZkAdIE0/qaPq3mEj3U nFXMl99g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1thpRL-00000003mRK-3Ahk; Tue, 11 Feb 2025 12:32:35 +0000 Received: from bali.collaboradmins.com ([148.251.105.195]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1thoXw-00000003ZJl-49xG; Tue, 11 Feb 2025 11:35:22 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1739273719; bh=w0yrFzDUVgcK+AfqU3lxAXZTZBsoLeZfdz2TO6KkcTM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Va0t7TwPn0ux+H/h4ncXbAdsSJjgXgQKf6cebqOfhZse77ZkOl3HfKgzzxgRu8S8f jGKrJ7x1qmz1VBdnsY8S9R2vSQdUWGlWrlAADc/DWYD1ZRpNSGl7LgdUja6n2uDpPq w6R2sw4WfN7v/Q+NHopZzlR/ke5P9tLMFGKot+CO7QFtaqSZEyln2+y/IgD49H08Dm Mw6/GvCuF6wMNQpvZw/LXfun21BuZ4Lfswb1QHal6svIy4OhcBXSDK4ft7rjFWDfx2 UrThn1/B5Q/OCQvkJnu7kL/aorm6c6m1suBRRWo4lxA4rlLF0fQbdl6XpNaCWdD9Ya 3xQrnawmZTJOA== Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by bali.collaboradmins.com (Postfix) with ESMTPSA id 68C8317E1556; Tue, 11 Feb 2025 12:35:18 +0100 (CET) From: AngeloGioacchino Del Regno To: chunkuang.hu@kernel.org Cc: p.zabel@pengutronix.de, airlied@gmail.com, simona@ffwll.ch, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, ck.hu@mediatek.com, jitao.shi@mediatek.com, jie.qiu@mediatek.com, junzhi.zhao@mediatek.com, dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@collabora.com, dmitry.baryshkov@linaro.org, lewis.liao@mediatek.com, ives.chenjh@mediatek.com, tommyyl.chen@mediatek.com, jason-jh.lin@mediatek.com Subject: [PATCH v6 40/42] drm/mediatek: mtk_hdmi_common: Add var to enable interlaced modes Date: Tue, 11 Feb 2025 12:34:07 +0100 Message-ID: <20250211113409.1517534-41-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250211113409.1517534-1-angelogioacchino.delregno@collabora.com> References: <20250211113409.1517534-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250211_033521_179233_CF68374E X-CRM114-Status: GOOD ( 10.84 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Add an interlace_allowed bool member to struct mtk_hdmi_ver_conf which will be used to signal whether interlaced modes are supported by the bridge (in our case, the HDMI IP), and enable it for HDMIv2. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: CK Hu --- drivers/gpu/drm/mediatek/mtk_hdmi_common.c | 1 + drivers/gpu/drm/mediatek/mtk_hdmi_common.h | 1 + drivers/gpu/drm/mediatek/mtk_hdmi_v2.c | 1 + 3 files changed, 3 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_common.c b/drivers/gpu/drm/mediatek/mtk_hdmi_common.c index 2f2e77b664a2..750bcb45c33d 100644 --- a/drivers/gpu/drm/mediatek/mtk_hdmi_common.c +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_common.c @@ -429,6 +429,7 @@ struct mtk_hdmi *mtk_hdmi_common_probe(struct platform_device *pdev) hdmi->bridge.ddc = hdmi->ddc_adpt; hdmi->bridge.vendor = "MediaTek"; hdmi->bridge.product = "On-Chip HDMI"; + hdmi->bridge.interlace_allowed = ver_conf->interlace_allowed; ret = devm_drm_bridge_add(dev, &hdmi->bridge); if (ret) diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_common.h b/drivers/gpu/drm/mediatek/mtk_hdmi_common.h index e74fe1371324..de5e064585f8 100644 --- a/drivers/gpu/drm/mediatek/mtk_hdmi_common.h +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_common.h @@ -137,6 +137,7 @@ struct mtk_hdmi_ver_conf { const struct hdmi_codec_ops *codec_ops; const char * const *mtk_hdmi_clock_names; int num_clocks; + bool interlace_allowed; }; struct mtk_hdmi_conf { diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_v2.c b/drivers/gpu/drm/mediatek/mtk_hdmi_v2.c index 338a6dda2fd2..36b7f8d8d218 100644 --- a/drivers/gpu/drm/mediatek/mtk_hdmi_v2.c +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_v2.c @@ -1292,6 +1292,7 @@ static const struct mtk_hdmi_ver_conf mtk_hdmi_conf_v2 = { .codec_ops = &mtk_hdmi_v2_audio_codec_ops, .mtk_hdmi_clock_names = mtk_hdmi_v2_clk_names, .num_clocks = MTK_HDMI_V2_CLK_COUNT, + .interlace_allowed = true, }; static const struct mtk_hdmi_conf mtk_hdmi_conf_mt8188 = {